PUMD2/ZLZ

PUMD2/ZLZ

  • Description:TRANS PREBIAS
  • Series:-

SKU:3d0b5be6faa8 Category: Brand:

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Product Detailed Parameters

  • Description:TRANS PREBIAS
  • Series:-
  • Mfr:Nexperia USA Inc.
  • Package:Bulk
  • Transistor Type:1 NPN, 1 PNP - Pre-Biased (Dual)
  • Current - Collector (Ic) (Max):100mA
  • Voltage - Collector Emitter Breakdown (Max):50V
  • Resistor - Base (R1):22kOhms
  • Resistor - Emitter Base (R2):22kOhms
  • DC Current Gain (hFE) (Min) @ Ic, Vce:60 @ 5mA, 5V
  • pa_vce-saturation-max-ib-ic:
  • Current - Collector Cutoff (Max):100nA
  • Frequency - Transition:230MHz, 180MHz
  • Power - Max:300mW
  • Grade:Automotive
  • Qualification:AEC-Q101
  • Mounting Type:Surface Mount
  • Package / Case:6-TSSOP, SC-88, SOT-363
  • Supplier Device Package:6-TSSOP

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PUMD2/ZLZ

Overview

The PUMD2/ZLZ is a dual pre-biased transistor array manufactured by Nexperia USA Inc., housed in a 6-TSSOP surface-mount package. It integrates one NPN and one PNP bipolar junction transistor (BJT) with built-in biasing resistors. The device supports a maximum collector-emitter voltage of 50V and a continuous collector current of 100mA, with a total power dissipation rating of 300mW. Each transistor includes an internal base resistor of 22 kΩ. Key electrical characteristics include a DC current gain (hFE) of at least 60 at 5mA and 5V, and a maximum saturation voltage of 150mV at 500µA base current and 10mA collector current.

Feature Summary

  • Integrates complementary NPN and PNP transistors with fixed internal biasing resistors to simplify circuit design.
  • Utilizes a compact 6-TSSOP surface-mount package for efficient space utilization on printed circuit boards.
  • Provides high current gain and low saturation voltage for effective switching performance.

Applications

  • General-purpose digital switching circuits requiring complementary logic levels.
  • Interface drivers for microcontrollers or logic gates needing level shifting or buffering.
  • Low-power signal processing applications utilizing dual transistor configurations.

Procurement Notes

Verify the specific suffix ZLZ against official Nexperia documentation to confirm tape-and-reel specifications or marking codes. Ensure compatibility with standard 6-TSSOP footprints during procurement planning. Cross-reference the part number with authorized distributors to confirm availability and authenticity. Request detailed datasheets to validate electrical parameters for your specific operating conditions before finalizing orders.

Selection Notes

Select this component when a complementary NPN/PNP pair with integrated biasing is required in a minimal footprint. The 22 kΩ internal resistors reduce external component count compared to discrete solutions. Consider the 300mW power dissipation limit and 50V voltage rating to ensure operation within safe limits. Verify that the 100mA current capacity meets the load requirements of the target application.

Part Context

The PUMD2 belongs to Nexperia's PUM series of pre-biased transistor arrays. These devices combine transistors and resistors into single packages to save board space. The PUMD2 variant specifically offers a complementary NPN/PNP configuration. It is designed for applications where space constraints and simplified assembly are critical priorities in electronic product design.

Replacement Considerations

Publicly confirmed substitute part numbers for PUMD2/ZLZ were not identified in the provided source material. Consult manufacturer cross-reference guides for potential alternatives such as other PUMD2 variants or compatible dual pre-biased arrays from other suppliers if direct substitution is necessary.

PUMD2/ZLZPUMD2/ZLZ

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