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The PUMD2,125 is a dual pre-biased NPN transistor array manufactured by Nexperia USA Inc. It integrates two NPN bipolar junction transistors with integrated base biasing resistors within a compact surface-mount package. The device features a collector-emitter breakdown voltage of 50V and a maximum continuous collector current of 100mA. Internal resistor values are specified as 10 kΩ for the base resistor (R1) and 47 kΩ for the emitter resistor (R2). The component operates within a temperature range of -55°C to +150°C and is housed in a 6-TSSOP (SOT-363) package.
Verify the specific suffix against official Nexperia documentation to confirm package type and tape-and-reel specifications. Ensure compatibility with automated pick-and-place equipment regarding the TSSOP footprint dimensions. Confirm RoHS compliance status through the manufacturer's latest declaration before finalizing procurement orders.
Select this component when a dual NPN solution with fixed biasing is required to reduce external component count. Compare internal resistance values against circuit requirements to ensure proper drive current capabilities. Consider the thermal dissipation characteristics of the SOT-363 package relative to the expected power load in the application environment.
This part belongs to Nexperia's PUM series of pre-biased transistor arrays. These devices are designed to replace multiple discrete components, simplifying PCB layout and assembly processes. The series offers various configurations including single and dual transistors with different resistor combinations.