SEARCH
— IC芯片 | 连接器 | 传感器 | 被动器件 —
The PUMD3,115 is a dual pre-biased bipolar junction transistor (BJT) array manufactured by Nexperia USA Inc. It integrates one NPN and one PNP transistor within a single 6-TSSOP surface-mount package. The device supports a maximum collector-emitter voltage of 50V and a continuous collector current of 100mA. Internal base resistors are specified at 10 kΩ for both the NPN and PNP sections. Key electrical characteristics include a minimum DC current gain (hFE) of 30 at 5mA and 5V, with a maximum collector cutoff current of 1µA. The component operates within a temperature range of -65°C to +150°C and has a maximum power dissipation of 300mW.
Verify the specific ordering suffix against the manufacturer's latest documentation to ensure correct packaging configuration. Confirm RoHS compliance status and moisture sensitivity level requirements prior to procurement. Cross-reference the full part number with official Nexperia distributors to validate authenticity and current production status.
Select this component when a compact solution requires both NPN and PNP switching capabilities with integrated base resistors. Ensure the 50V voltage rating and 100mA current limit meet the circuit demands. Verify that the 10kΩ internal resistance values align with the driving logic levels and required switching speeds for the specific application design.
This part belongs to the PUMD series of pre-biased BJT arrays from Nexperia. It shares the same core transistor structure as variants like PUMD9 but differs in packaging or specific resistor configurations. The PUMD3,115 specifically utilizes the TSSOP-6 form factor, distinguishing it from other series members that may use different footprint standards.
Direct substitutes include PEMD3,115 and PUMD9,115. Verify pinout compatibility and exact resistor values before substitution. Check if alternative packages require PCB layout modifications.