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The PUMD48-Q is an NPN/PNP resistor-equipped double transistor (RET) housed in a SOT363-3 (SC-88) surface-mounted plastic package. It integrates two transistors with built-in bias resistors, featuring a 50 V collector-emitter voltage rating and 100 mA output current capability per device. The NPN transistor (TR1) includes a 47 kΩ input bias resistor, while the PNP transistor (TR2) utilizes a 2.2 kΩ input bias resistor. Both share a common 47 kΩ feedback resistor. The component is AEC-Q101 qualified for automotive applications and operates within a junction temperature range of -65 °C to 150 °C.
Verify the specific ordering code against the manufacturer's official database to ensure correct package version and marking code alignment. Confirm that the AEC-Q101 qualification status meets the target application's reliability requirements before finalizing procurement specifications.
Select this component when space-constrained designs require matched NPN/PNP pairs with integrated biasing. The specific resistor values (47 kΩ and 2.2 kΩ) are fixed; verify compatibility with existing logic levels and drive currents. Ensure thermal management accounts for the 300 mW total power dissipation limit at ambient temperatures up to 25 °C.
This part belongs to Nexperia's family of Resistor-Equipped Transistors (RETs), designed to replace multiple discrete components. The PUMD48-Q specifically combines an NPN and PNP unit in a single SOT363-3 footprint, offering a compact solution for mixed-polarity signal processing or interface circuits where board real estate is limited.
Direct replacements must match the SOT363-3 package and internal resistor ratios. Verify pinout compatibility, as RET pin configurations vary significantly between manufacturers. Check if alternative parts offer equivalent AEC-Q101 qualification if automotive usage is required.