PUMD48/ZLX

PUMD48/ZLX

  • Description:TRANS PREBIAS
  • Series:-

SKU:cac4d3a967b2 Category: Brand:

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Product Detailed Parameters

  • Description:TRANS PREBIAS
  • Series:-
  • Mfr:Nexperia USA Inc.
  • Package:Bulk
  • Transistor Type:1 NPN, 1 PNP - Pre-Biased (Dual)
  • Current - Collector (Ic) (Max):100mA
  • Voltage - Collector Emitter Breakdown (Max):50V
  • Resistor - Base (R1):47kOhms, 2.2kOhms
  • Resistor - Emitter Base (R2):47kOhms
  • DC Current Gain (hFE) (Min) @ Ic, Vce:80 @ 5mA, 5V / 100 @ 10mA, 5V
  • pa_vce-saturation-max-ib-ic:
  • Current - Collector Cutoff (Max):1µA
  • Frequency - Transition:230MHz, 180MHz
  • Power - Max:300mW
  • Grade:-
  • Qualification:-
  • Mounting Type:Surface Mount
  • Package / Case:6-TSSOP, SC-88, SOT-363
  • Supplier Device Package:6-TSSOP

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PUMD48/ZLX

Overview

The Nexperia PUMD48 is a Resistor-Equipped Transistor (RET) double transistor featuring one NPN and one PNP unit in a TSSOP6 (SOT363-3) package. It provides a collector-emitter voltage of 50 V and an output current capability of 100 mA per transistor. The device integrates bias resistors: TR1 (NPN) includes R1 = 47 kΩ and R2 = 47 kΩ, while TR2 (PNP) includes R1 = 2.2 kΩ and R2 = 47 kΩ. Total power dissipation is rated at 300 mW at 25 °C ambient temperature.

Feature Summary

  • Integrates dual transistors with built-in bias resistors to simplify circuit design
  • Reduces component count and pick-and-place costs in surface-mount applications
  • Provides high DC current gain for efficient switching operations

Applications

  • Low current peripheral driver circuits
  • Control of IC inputs
  • Replacement for general-purpose transistors in digital applications

Procurement Notes

Verify the specific ordering suffix against the manufacturer's official documentation to confirm the exact packaging configuration and manufacturing site code. Ensure that the selected variant matches the required tape and reel specifications for automated assembly processes.

Selection Notes

Select this component when space constraints require a dual transistor solution with integrated base biasing. Verify that the internal resistor values align with the target logic levels and drive requirements for both NPN and PNP channels within the application circuit.

Part Context

The PUMD48 belongs to Nexperia's family of Resistor-Equipped Transistors designed for compact digital logic interfaces. It consolidates discrete transistor and resistor functions into a single SMD footprint, facilitating miniaturization in portable electronics and dense printed circuit board layouts.

Replacement Considerations

Consult official Nexperia cross-reference lists for verified substitutes. Ensure any replacement maintains identical pinout configurations, voltage ratings, and thermal characteristics to guarantee compatibility with existing PCB footprints.

FAQ

What are the specific resistance values for the built-in bias resistors?

For the NPN transistor (TR1), R1 is 47 kΩ and R2 is 47 kΩ. For the PNP transistor (TR2), R1 is 2.2 kΩ and R2 is 47 kΩ.

What is the maximum total power dissipation for the device?

The total power dissipation (Ptot) is 300 mW when the ambient temperature is 25 °C or lower.

Which package type does the PUMD48 utilize?

The device is housed in a TSSOP6 plastic surface-mounted package, also designated as SOT363-3.

PUMD48/ZLXPUMD48/ZLX

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