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The Nexperia PUMD6/ZLX is a dual NPN pre-biased resistor transistor (NPN+NPN) in a US SOT323 package. It integrates two NPN transistors with base resistors for simplified circuit design. Key electrical parameters include a maximum collector-emitter voltage (Vceo) of 50 V, a maximum collector-base voltage (VCBO) of 50 V, and a maximum emitter-base voltage (VEBO) of 10 V. The device supports a maximum DC collector current (Idc) of 100 mA and has a minimum DC current gain (hFE) of 100. Power dissipation is rated at 200 mW, with an operating temperature range from -65°C to +150°C.
Verify the specific suffix ZLX against official Nexperia documentation to confirm tape and reel specifications. Ensure compatibility with automated pick-and-place equipment by checking reel dimensions and leader/trailer requirements. Confirm RoHS compliance status through the manufacturer's latest environmental declaration before procurement.
Select this component when a compact dual NPN solution with integrated biasing is required. Compare hFE ranges and base resistance values against alternative pre-biased transistor pairs. Consider the SOT323 footprint constraints and thermal performance limits relative to the application's power dissipation needs.
This part belongs to the PUMD series of pre-biased transistors from Nexperia. These devices are designed to replace multiple discrete components, simplifying assembly. The US package refers to the SOT323 surface-mount form factor, widely used in portable and space-constrained electronic designs.
Check for direct equivalents such as the PUMD6 or similar NPN+NPN pre-biased transistors in SOT323 packages. Verify pinout compatibility and electrical parameter overlaps before substitution. Consult Nexperia's cross-reference tools for validated alternatives.