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The Nexperia PUMD6HF is a dual pre-biased NPN/PNP transistor array housed in a compact SOT-363 (SC-88) surface-mount package. It integrates two transistors with internal base resistors to simplify circuit design and reduce board space. Key electrical parameters include a maximum collector-emitter voltage (Vceo) of 50 V, a maximum collector current (Ic) of 100 mA, and a total power dissipation (Pd) of 200 mW. The device features a minimum DC current gain (hFE) of 100 at specified test conditions and operates within a temperature range of -65°C to +150°C.
Verify the specific suffix code against official Nexperia documentation to confirm resistor values and pinout configuration. Ensure compatibility with automated pick-and-place equipment due to the small SOT-363 footprint. Confirm RoHS compliance status through the manufacturer's latest product change notification records prior to final procurement.
Select this component when space-constrained designs require integrated biasing for both NPN and PNP paths. Compare internal resistor tolerances and hFE ranges against target circuit requirements. Consider thermal management constraints given the 200 mW power dissipation limit in the small plastic package.
The PUMD6HF belongs to Nexperia's PUMD series of pre-biased transistor arrays. This series consolidates discrete transistors and resistors into single packages to enhance reliability and reduce assembly complexity. It serves as a direct replacement for older discrete resistor-transistor combinations in consumer electronics and industrial control modules.
The internal base resistors are typically 4.7 kΩ for both the NPN and PNP sections, though exact values should be confirmed via the specific datasheet revision.
While some variants in the PUMD series carry AEC-Q101 qualification, verification of the specific PUMD6HF part number against official Nexperia certification documents is required to confirm automotive grade status.
The maximum operating junction temperature is 150°C, allowing for operation in elevated thermal environments common in compact electronic assemblies.