PUMH1,115

Overview

The Nexperia PUMH1,115 is a dual NPN resistor-equipped transistor (digital transistor) housed in a UMT6 surface-mount package. It integrates two NPN transistors with built-in bias resistors to simplify circuit design and reduce component count. Key electrical parameters include a maximum collector-emitter voltage (VCEO) of 50 V, a maximum DC collector current (IC) of 100 mA, and a maximum power dissipation (Pd) of 200 mW. The device features a minimum DC current gain (hFE) of 30 and operates within a temperature range of 0°C to +150°C. It is qualified under the AEC-Q101 standard for automotive applications.

Feature Summary

• Integrates dual NPN transistors with built-in bias resistors to minimize external components
• Optimized for low voltage collector-emitter saturation performance
• AEC-Q101 qualified for automotive reliability requirements

Applications

• Low current peripheral driver circuits
• Control of IC inputs
• Replacement for general-purpose transistors in digital logic applications

Procurement Notes

Verify the exact part number against official Nexperia documentation, as the specific suffix

Selection Notes

Select this component when a compact solution for driving low-current loads or interfacing with digital logic inputs is required. The integrated resistors eliminate the need for external base resistors, reducing board space and assembly costs. Ensure the 50 V voltage rating and 100 mA current capacity meet the specific circuit demands.

Part Context

This component belongs to the Nexperia PUMH series of pre-biased transistors. These devices are designed to replace multiple discrete components, offering a space-saving alternative for digital switching applications. The UMT6 package provides a small footprint suitable for dense PCB layouts.

Replacement Considerations

Check for direct substitutes within the PUMH series with matching resistor values. Verify pinout compatibility and thermal characteristics before substituting with other manufacturers' digital transistors.