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The Nexperia PUMH13 is a dual NPN Resistor-Equipped Transistor (RET) housed in a SOT363-3 surface-mount package. It integrates two NPN transistors with built-in bias resistors, specifically R1 at 4.7 kΩ and R2 at 47 kΩ per transistor. The device supports a maximum collector-emitter voltage of 50 V and a continuous output current of 100 mA per transistor. Total power dissipation is rated at 200 mW per transistor and 300 mW for the entire device at 25 °C ambient temperature. The transition frequency reaches 230 MHz, and the DC current gain is typically 100.
Verify the specific ordering suffix against the manufacturer's official documentation to confirm packaging details and manufacturing site codes. Ensure the selected variant matches the required SOT363-3 package specification. Confirm that the product status aligns with production availability before finalizing procurement plans.
Select this component when a dual NPN configuration with integrated biasing is required for digital logic interfacing. Verify that the 50 V collector-emitter voltage rating meets the circuit's maximum operating conditions. Ensure the 100 mA output current capability satisfies the load requirements for both transistors simultaneously.
This part belongs to the PUMH series of NPN/NPN resistor-equipped double transistors. It serves as the NPN counterpart to the PUMD13 (NPN/PNP) and PUMB13 (PNP/PNP) variants. All members share the same SOT363-3 footprint and similar electrical characteristics tailored for complementary or identical dual-transistor applications.
Direct functional substitutes include the PUMD13 for NPN/PNP configurations and the PUMB13 for PNP/PNP configurations. Other RETs from different manufacturers may require verification of pinout compatibility and resistor tolerance values.