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The Nexperia PUMH13,115 is a dual NPN resistor-equipped transistor (RET) housed in a SOT363-3 surface-mounted package. It integrates two independent NPN transistors with built-in bias resistors: R1 is 4.7 kΩ and R2 is 47 kΩ. The device supports a maximum collector-emitter voltage of 50 V and a continuous output current of 100 mA per transistor. Total power dissipation is rated at 300 mW for the device and 200 mW per transistor at 25 °C ambient temperature. The transition frequency reaches 230 MHz, and the DC current gain is typically 100.
Verify the specific ordering suffix against the manufacturer's official documentation to confirm the correct tape and reel configuration. Confirm that the requested part number matches the exact electrical specifications required for the target application before finalizing procurement orders.
Select this component when space constraints require a dual NPN solution with integrated biasing. Ensure the application voltage does not exceed the 50 V collector-emitter rating. Verify that the 4.7 kΩ input resistance aligns with the driving source requirements for the intended digital logic interface.
This component belongs to the PUMH series of NPN/NPN resistor-equipped double transistors. It serves as the NPN/NPN complement within the family, alongside the PUMD13 (NPN/PNP) and PUMB13 (PNP/PNP) variants. All members share similar physical dimensions and switching characteristics tailored for compact digital switching tasks.
Direct functional substitutes include the PUMD13 for mixed polarity needs or the PUMB13 for dual PNP configurations. Verify pin compatibility and thermal performance when replacing with other RET families from different manufacturers.