PUMH15,115

Overview

The Nexperia PUMH15,115 is a dual NPN resistor-equipped transistor (RET) housed in a SOT363-3 (SC-88/TSSOP6) surface-mount package. It integrates two independent NPN transistors with built-in bias resistors, where R1 is nominally 4.7 kΩ and the R2/R1 ratio is unity. The device supports a maximum collector-emitter voltage of 50 V and a continuous output current of 100 mA per transistor. Total power dissipation reaches 300 mW at 25 °C ambient temperature. Key electrical characteristics include a DC current gain (hFE) minimum of 30 at 10 mA, a transition frequency (fT) typical value of 230 MHz, and an operating junction temperature range up to 150 °C.

Feature Summary

• Integrates two NPN transistors with fixed internal bias resistors to reduce external component count.
• Provides simplified circuit design by eliminating the need for discrete base drive resistors.
• Offers high-density packaging that replaces multiple individual components on the PCB.
• Delivers low saturation voltage and high current gain suitable for digital switching applications.

Applications

• Low current peripheral driver circuits
• Control of IC inputs
• Replacement for general-purpose transistors in digital logic applications

Procurement Notes

Verify the specific ordering suffix against the manufacturer's latest documentation to confirm tape-and-reel quantities and manufacturing site codes. Ensure the procurement channel sources directly from authorized distributors to guarantee authenticity and traceability. Cross-reference the marking code 'H2%' with production batches during incoming inspection to validate component origin and date codes.

Selection Notes

Select this component when a compact solution requires dual NPN switching with integrated base biasing. The 4.7 kΩ input resistance suits standard logic levels. Verify thermal constraints as total power dissipation is limited to 300 mW. Consider the SOT363-3 footprint dimensions for PCB layout compatibility. Evaluate the 50 V breakdown voltage against peak transient loads in the target application environment.

Part Context

The PUMH15 belongs to Nexperia's Resistor-Equipped Transistor (RET) family, designed to consolidate discrete transistor and resistor networks into single packages. This series aims to minimize board space and assembly costs. The PUMH15 specifically provides a dual NPN configuration, serving as a complement to other RET variants like the PUMD15 (NPN/PNP) and PUMB15 (PNP/PNP).

Replacement Considerations

Direct functional substitutes within the same package include the PEMH15, which shares identical pinout and electrical specifications. Other RET families may offer similar configurations but require verification of bias resistor values and hFE ranges to ensure circuit compatibility without redesign.