PUMH2/DG/B3,115

PUMH2/DG/B3,115

  • Description:TRANS PREBIAS 2NPN 50V 6TSSOP
  • Series:-

SKU:b8d2dc9522c2 Category: Brand:

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Product Detailed Parameters

  • Description:TRANS PREBIAS 2NPN 50V 6TSSOP
  • Series:-
  • Mfr:Nexperia USA Inc.
  • Package:Tape & Reel (TR)
  • Transistor Type:2 NPN - Pre-Biased (Dual)
  • Current - Collector (Ic) (Max):100mA
  • Voltage - Collector Emitter Breakdown (Max):50V
  • Resistor - Base (R1):47kOhms
  • Resistor - Emitter Base (R2):47kOhms
  • DC Current Gain (hFE) (Min) @ Ic, Vce:80 @ 5mA, 5V
  • pa_vce-saturation-max-ib-ic:
  • Current - Collector Cutoff (Max):1µA
  • Frequency - Transition:230MHz
  • Power - Max:300mW
  • Grade:-
  • Qualification:-
  • Mounting Type:Surface Mount
  • Package / Case:6-TSSOP, SC-88, SOT-363
  • Supplier Device Package:6-TSSOP

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PUMH2/DG/B3,115

Overview

The PUMH2/DG/B3,115 is a dual NPN resistor-equipped transistor (RET) manufactured by Nexperia USA Inc. in a 6-pin TSSOP surface-mount package. It integrates two NPN transistors with built-in bias resistors to simplify circuit design and reduce component count. The device supports a maximum collector-emitter voltage of 50 V and a continuous collector current of 100 mA, with a total power dissipation rating of 300 mW. Key electrical parameters include a DC current gain (hFE) minimum of 100 at 5 mA and 5 V, and a saturation voltage of 100 mV at specific base and collector currents. The integrated resistors are typically 10 kΩ for the base (R1) and 47 kΩ for the emitter (R2).

Feature Summary

  • Integrates dual NPN transistors with built-in bias resistors to minimize external components.
  • Optimized for low-profile surface-mount applications to reduce pick-and-place costs.
  • Provides simplified switching capabilities for digital logic interfaces.

Applications

  • Low-current peripheral drivers in mobile devices.
  • Control circuits for IC inputs.
  • Replacement for general-purpose transistors in digital logic applications.

Procurement Notes

Verify the specific suffix /DG/B3 against official Nexperia documentation to confirm tape-and-reel packaging specifications and moisture sensitivity level. Ensure compatibility with automated assembly processes by checking the recommended reflow soldering profile for the TSSOP-6 package. Confirm RoHS compliance status for the target market regulations before finalizing procurement orders.

Selection Notes

Select this component when space constraints require replacing discrete transistors and resistors with a single surface-mount solution. The 10 kΩ/47 kΩ resistor ratio is suitable for standard TTL or CMOS logic levels. Consider the 300 mW power dissipation limit and thermal resistance characteristics if operating near maximum current ratings in enclosed environments.

Part Context

This part belongs to the Nexperia PUM series of Resistor-Equipped Transistors (RETs), designed specifically for high-density PCB layouts. The PUMH2 variant features dual NPN configurations, distinguishing it from mixed NPN/PNP models like the PEMD series. These devices are commonly utilized in portable electronics where board real estate and assembly efficiency are critical design factors.

Replacement Considerations

Direct substitutes include other Nexperia dual NPN RETs such as the PUMH9 or PQMH9, provided the internal resistor values match the circuit requirements. Verify pinout compatibility between different package types like SOT-363 and DFN1010B-6 if physical footprint changes are permissible.

PUMH2/DG/B3,115PUMH2/DG/B3,115

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