SEARCH
— IC芯片 | 连接器 | 传感器 | 被动器件 —
The Nexperia PUMZ1,115 is a dual NPN digital transistor housed in a UMT (SOT-363) surface-mount package with six pins. It integrates two NPN transistors with built-in bias resistors to simplify circuit design and reduce component count. Key electrical parameters include a maximum DC collector current of 100 mA, a collector-emitter voltage of 50 V, and a collector-base voltage of 50 V. The device features a minimum DC current gain of 100, a maximum power dissipation of 200 mW, and an emitter-base voltage rating of 10 V. It operates within a temperature range of -65°C to +150°C.
Verify the specific suffix 115 corresponds to the standard tape-and-reel packaging configuration required for automated assembly processes. Confirm that the AEC-Q101 qualification meets the specific reliability requirements of the target automotive or industrial application before finalizing procurement orders.
Select this component when space-constrained designs require dual NPN switching with integrated base drive. Ensure the 100 mA output current capability aligns with load requirements. Verify that the 50 V voltage ratings exceed the maximum circuit voltages to prevent breakdown during operation.
This part belongs to the PUMZ series of resistor-equipped transistors from Nexperia. These devices are engineered to replace multiple discrete components, thereby reducing printed circuit board area and assembly costs. The UMT package provides a compact footprint suitable for high-density electronic assemblies.
Direct substitutes include other dual NPN digital transistors in SOT-363 packages with similar electrical characteristics, such as the BC847CDT1G or equivalent parts from other manufacturers offering identical pinouts and bias configurations.