RC19020AGN6#KD0

RC19020AGN6#KD0

$2.78
  • Description:RC19020A DB2000QL FROM AP901T WI
  • Series:-

SKU:2e8006674b1c Category: Brand:

  
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Product Detailed Parameters

  • Description:RC19020A DB2000QL FROM AP901T WI
  • Series:-
  • PLL:No
  • Mfr:Renesas Electronics Corporation
  • Main Purpose:PCI Express (PCIe)
  • Input:HCSL, LVDS
  • Output:LP-HCSL
  • Number of Circuits:1
  • Ratio - Input:Output:1:20
  • Differential - Input:Output:Yes/Yes
  • Frequency - Max:400MHz
  • Voltage - Supply:2.97V ~ 3.63V
  • Operating Temperature:-40°C ~ 105°C (TA)
  • Mounting Type:Surface Mount
  • Package / Case:80-VFQFN Dual Rows, Exposed Pad
  • Supplier Device Package:80-GQFN (6x6)

Download product information

RC19020AGN6#KD0

Overview

The RC19020AGN6#KD0 is a PCIe Gen7 compliant clock buffer featuring one differential input and twenty LP-HCSL outputs. It operates within a frequency range of 1 MHz to 400 MHz on a single 3.3 V supply, consuming approximately 716 mW. The device supports LVDS and HCSL inputs and provides selectable output slew rates via SMBus. Key features include power down tolerance, flexible startup sequencing, automatic clock parking, and open-drain loss-of-signal indication. It is housed in an 80-GQFN package measuring 6 mm x 6 mm.

Feature Summary

  • PCIe Gen 1–7 compliance with ultra-low additive jitter (Typ 30 fs RMS)
  • 20 LP-HCSL outputs eliminating up to 8 terminated resistors
  • Supports source-terminated and double-terminated loads with selectable 85Ω impedance
  • Flexible startup sequencing (FSS) and automatic clock parking (ACP)

Applications

  • PCI Express Gen7 system clock distribution
  • High-performance server and storage backplanes
  • Network infrastructure equipment requiring low jitter

Procurement Notes

Verify the specific ordering suffix #KD0 against official Renesas documentation to confirm packaging details such as reel quantity and carrier type. Ensure the 80-GQFN package dimensions match the design footprint requirements. Confirm that the -40°C to +105°C operating temperature range aligns with the target application environment.

Selection Notes

Select this component for designs requiring high fan-out from a single reference clock to multiple PCIe endpoints. The backward compatibility with earlier PCIe generations allows for versatile use across different system generations. Verify that the input signal type matches the available LVDS or HCSL sources and that the 3.3 V supply voltage is stable within the specified 2.97 V to 3.63 V range.

Part Context

This part belongs to the RC190xxA family of PCIe clock buffers. It is pin-compatible with the DB2000Q/DB2000QL plus, adding Loss-Of-Signal (LOS) indication and an SBI_OUT pin for daisy-chaining multiple clock chips. This compatibility simplifies migration from previous generation designs while offering enhanced monitoring capabilities.

Replacement Considerations

The RC19020 is pin-compatible with the DB2000Q and DB2000QL plus. Designers migrating from these devices should verify that the additional LOS and SBI_OUT pins are correctly handled in the new layout.

RC19020AGN6#KD0RC19020AGN6#KD0
$2.78
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