UARTs (Universal Asynchronous Receiver Transmitter) SC28L92A1BS,528 product image

SC28L92A1BS,528

$5.61
  • Description:IC UART DUAL W/FIFO 48HVQFN
  • Series:Impact

SKU:b5de600f181d Category: Brand:

  
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SC28L92A1BS,528 is listed in the UARTs (Universal Asynchronous Receiver Transmitter) range at ChipApex. The manufacturer field lists NXP USA Inc.. Its product description is IC UART DUAL W/FIFO 48HVQFN. Review the specifications below when checking this part for your BOM.

UARTs (Universal Asynchronous Receiver Transmitter) specifications for SC28L92A1BS,528

  • Description:IC UART DUAL W/FIFO 48HVQFN
  • Series:Impact
  • Mfr:NXP USA Inc.
  • Package:Tape & Reel (TR)
  • Features:Configurable GPIO, Internal Oscillator, Timer/Counter
  • Number of Channels:2, DUART
  • FIFO's:16 Byte
  • Protocol:-
  • Data Rate (Max):1Mbps
  • Voltage - Supply:3.3V, 5V
  • With Auto Flow Control:Yes
  • With IrDA Encoder/Decoder:-
  • With False Start Bit Detection:Yes
  • With Modem Control:Yes
  • Mounting Type:Surface Mount
  • Package / Case:48-VFQFN Exposed Pad
  • Supplier Device Package:48-HVQFN (6x6)
  • Grade:-
  • Qualification:-

UARTs (Universal Asynchronous Receiver Transmitter) datasheet and documents for SC28L92A1BS,528

SC28L92A1BS,528

UARTs (Universal Asynchronous Receiver Transmitter) Overview

The SC28L92A1BS,528 is a Dual Universal Asynchronous Receiver/Transmitter (DUART) from NXP Semiconductors. It operates on a single 3.3 V or 5 V supply and supports data transfer rates up to 1 Mbit/s. The device features two independent full-duplex channels, each equipped with 16-byte FIFOs for both reception and transmission. It provides pin-programmable compatibility with Intel (80xxx) and Motorola (68xxx) bus interfaces. The component includes an on-chip crystal oscillator, programmable baud rate generators, and a versatile interrupt system.

UARTs (Universal Asynchronous Receiver Transmitter) Feature Summary

  • Dual full-duplex asynchronous receiver/transmitters with 16-character FIFOs
  • Pin-programmable interface for 68xxx or 80xxx bus architectures
  • Programmable data formats including variable data bits, parity, and stop bits
  • Integrated watchdog timer for each receiver channel

UARTs (Universal Asynchronous Receiver Transmitter) Applications

  • Clustered terminal systems requiring dual-speed channel operation
  • Microprocessor-based serial communication interfaces
  • Multi-drop applications utilizing automatic wake-up mode

UARTs (Universal Asynchronous Receiver Transmitter) Procurement Notes

Verify the specific ordering suffix matches the HVQFN48 package variant. Confirm that the required temperature range aligns with the industrial specification of -40 °C to +85 °C. Ensure the design accommodates the exposed thermal pad requirements for proper grounding and heat dissipation in the selected package configuration.

UARTs (Universal Asynchronous Receiver Transmitter) Selection Notes

Select this component when replacing legacy SCC2692 or SC26C92 devices while requiring deeper FIFO buffers. Choose the 80xxx mode if interfacing with Intel-compatible processors, or the 68xxx mode for Motorola-compatible buses. Consider the HVQFN48 package for space-constrained designs requiring enhanced thermal performance.

UARTs (Universal Asynchronous Receiver Transmitter) Part Context

This part belongs to the SC28L92 family within the IMPACT product line. It serves as a direct pin and function replacement for older UART models but offers extended capabilities such as faster speeds and additional control registers. The device is designed to power up in a configuration compatible with the SC26C92 to facilitate easier migration.

UARTs (Universal Asynchronous Receiver Transmitter) Replacement Considerations

SC28L92A1B

UARTs (Universal Asynchronous Receiver Transmitter) FAQ

How is the bus interface type determined?

The bus interface is determined by the logic level on the I/M pin. Connecting I/M to HIGH configures the device for the 80xxx (Intel) interface, while connecting it to LOW selects the 68xxx (Motorola) interface.

Can the FIFO size be adjusted?

Yes, the FIFO capacity can be configured for either 8 bytes or 16 bytes per channel. This setting is controlled by bit 3 of the Mode Register 0 (MR0A).

What clock sources are supported?

The device supports an internal crystal oscillator connected across X1/CLK and X2 pins, or an external clock signal applied directly to the X1/CLK input.

SC28L92A1BS,528SC28L92A1BS,528
$5.61
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