SI52202-A01BGM

Overview

The Skyworks Si52202-A01BGM is a two-output PCIe clock generator supporting Gen 1 through Gen 7 and SRIS architectures. It operates on a 1.5 V to 1.8 V supply with separate VDD and VDD_IO rails. The device provides two 100 MHz differential LP-HCSL outputs compliant with common clock and separate reference specifications. It accepts a 25 MHz crystal or clock input and features internal 85 Ω or 100 Ω line matching. Control is managed via individual hardware pins or I²C for output enable, spread spectrum, and frequency selection.

Feature Summary

• Two-output LP-HCSL clock generator compliant with PCIe Gen 1/2/3/4/5/6/7
• Internal 85 Ω or 100 Ω impedance matching eliminates external resistors
• Individual hardware control pins and I²C support for output enable and spread spectrum
• Low jitter of 0.085 ps (RMS) max to meet PCIe Gen 6 specifications

Applications

• Servers
• Storage systems
• Data centers
• PCIe add-on cards
• Network Interface Cards (NICs)

Procurement Notes

Verify the specific ordering suffix 'A01BGM' against the official Skyworks datasheet to confirm package type and termination options. Confirm availability status as distribution data may vary. Ensure compliance with RoHS-6 requirements before procurement.

Selection Notes

Select this component for designs requiring only two differential PCIe clock outputs. Verify that the 100 MHz frequency requirement aligns with the Si52202 limitations, as higher frequencies require factory contact. Ensure the board layout supports the 20-pin QFN (3 x 3 mm) package dimensions.

Part Context

The Si52202 is part of the Si522xx family, which includes the Si52212, Si52208, and Si52204. This family shares similar architectural features but varies in output count and package size. The Si52202 specifically offers the smallest footprint in the industry for a two-output PCIe clock generator.

Replacement Considerations

Direct replacements within the same family include other Si52202 variants with different suffixes. Cross-family substitution with Si52204 or Si52208 requires evaluating pin compatibility and unused output handling.