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Product Detailed Parameters
- Description：IC PCIE BUFFER 100MHZ 32QFN
- Series：-
- PLL：No
- Mfr：Skyworks Solutions Inc.
- Main Purpose：PCI Express (PCIe)
- Input：Clock, Crystal
- Output：HCSL
- Number of Circuits：1
- Ratio - Input:Output：1:06
- Differential - Input:Output：No/Yes
- Frequency - Max：100MHz
- Voltage - Supply：3.135V ~ 3.465V
- Operating Temperature：-40°C ~ 85°C
- Mounting Type：Surface Mount
- Package / Case：32-WFQFN Exposed Pad
- Supplier Device Package：32-QFN (5x5)
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Overview
The SI53156-A01AGMR is a PCIe Gen 1/2/3/4 fanout buffer in a 32-pin QFN package. It sources six differential outputs from a single input, supporting frequencies of 100–210 MHz. The device operates on a 3.3 V supply (3.135–3.465 V) with a dynamic current of 45 mA at 100 MHz. It features dedicated hardware OE pins and I2C control for output enablement, skew, edge rate, and amplitude adjustment. The unit is rated for an extended temperature range of –40 to +85 °C.
Feature Summary
- PCIe Gen 1 through Gen 4 common clock compliant
- Six low-power push-pull differential outputs with internal termination
- I2C programmability for dynamic skew, edge rate, and amplitude control
- Spread spectrum tolerant clock input
Applications
- Network attached storage
- Multi-function printers
- Wireless access points
- Routers
Procurement Notes
Verify the 'R' suffix indicates tape and reel packaging rather than tube packaging. Confirm the specific revision code matches the required documentation version. Ensure the component meets RoHS standards as specified by the manufacturer.
Selection Notes
Select this part when a single source clock must drive up to six PCIe endpoints simultaneously. The I2C interface allows for system-level optimization of signal integrity and EMI signatures. Verify that the 100–210 MHz input frequency range aligns with the system's reference clock requirements.
Part Context
This model belongs to the SI53156 family of PCIe fanout buffers. The -A01AGM variant utilizes tube packaging, whereas the -A01AGMR variant utilizes tape and reel packaging. Both variants share identical electrical specifications and pinouts.
Replacement Considerations
SI53156-A01AGM: Identical electrical performance; differs only in shipping packaging (tube vs. tape and reel).
FAQ
How are the differential outputs enabled?
Outputs can be enabled via dedicated active-high hardware OE pins or through I2C communication bits.
What is the maximum additive jitter for PCIe Gen 3?
The maximum additive PCIe Gen 3 phase jitter RMS is 0.10 ps.
Does the device support LVDS outputs?
Yes, the datasheet explicitly lists support for LVDS outputs among its features.
