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The SI5324A-C-GMR is a low-bandwidth, jitter-attenuating precision clock multiplier utilizing Skyworks DSPLL technology. It accepts two input clocks from 2 kHz to 710 MHz and generates two output clocks ranging from 2 kHz to 945 MHz, with select frequencies reaching 1.4 GHz. The device features ultra-low jitter outputs as low as 290 fs rms (12 kHz–20 MHz) and 320 fs rms (50 kHz–80 MHz). It operates on a single supply of 1.8 V ±5%, 2.5 V ±10%, or 3.3 V ±10% within an ambient temperature range of –40 °C to +85 °C.
Verify the specific speed grade suffix 'A' against the ordering guide to confirm frequency limits and electrical characteristics. Confirm package type is 36-lead QFN. Check for moisture sensitivity handling requirements during storage and assembly.
Select based on required output frequency range and jitter specifications. Ensure the chosen supply voltage (1.8V, 2.5V, or 3.3V) matches the system design. Verify that the input clock frequencies fall within the 2 kHz to 710 MHz range. Consider the need for I2C or SPI interface compatibility.
The SI5324A-C-GMR belongs to the Si5324 family of any-frequency precision clock multipliers and jitter attenuators. It is part of Skyworks' third-generation DSPLL technology lineup, designed to eliminate external VCXO and filter components. The 'GMR' suffix indicates a reel packaging format.
Public confirmed substitute part numbers are not available in the provided documentation.