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SI5330B-B00206-GMR is listed in the Clock Buffers, Drivers range at ChipApex. The manufacturer field lists Skyworks Solutions Inc.. Its product description is IC CLK BUFFER 1:4 710MHZ 24QFN. Review the specifications below when checking this part for your BOM.
The SI5330B-B00206-GMR is a low-jitter, low-skew clock buffer and level translator manufactured by Skyworks Solutions. It accepts a differential input signal and generates four differential LVDS outputs at 1.8 V. The device supports an input frequency range of 5 to 710 MHz. Key electrical specifications include a typical additive phase jitter of 150 fs RMS (12 kHz–20 MHz), output-to-output skew of 100 ps, and a typical propagation delay of 2.5 ns. It operates on a core supply voltage of 1.8 V, 2.5 V, or 3.3 V with independent output driver supplies.
Verify the specific ordering suffix against the manufacturer's documentation to confirm the package type and shipment media. The 'GMR' suffix typically indicates tape and reel packaging, while other suffixes may denote tray quantities. Confirm RoHS compliance status directly with the supplier or datasheet revision notes prior to procurement.
Select this component when a differential-to-differential LVDS translation is required for signals between 5 MHz and 710 MHz. Ensure the output driver supply voltage (VDDO) is set to 1.8 V to match the specified LVDS levels. Verify that the system power budget accommodates the typical 10 mA core current and the specific load capacitance requirements for LVDS termination.
This part belongs to the Si5330 family of low-jitter clock buffers. The 'B' designation identifies it as an LVDS buffer variant. Other variants in the series support different output formats such as LVPECL, HCSL, CMOS, SSTL, and HSTL, accommodating various interface standards within high-performance digital systems.
Direct functional replacements within the same family include Si5330B-B00204-GM (3.3 V LVDS) and Si5330B-B00205-GM (2.5 V LVDS). These parts share the same pinout and differential input structure but require adjustment of the VDDO supply voltage to match the target logic levels.
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