SI5330K-B00226-GM

Clock Buffers, Drivers Overview

The SI5330K-B00226-GM is a low-jitter, low-skew clock buffer and level translator from Skyworks Solutions. It accepts a single-ended input signal and generates four differential LVPECL outputs. The device supports an input frequency range of 5 to 350 MHz. It operates with a core supply voltage (VDD) of 1.8 V, 2.5 V, or 3.3 V, while the output driver supply (VDDO) is set to 2.5 V for LVPECL compatibility. Key electrical parameters include a typical additive jitter of 150 fs RMS, an output-to-output skew of 100 ps, and a typical propagation delay of 2.5 ns. The component is housed in a 24-lead, 4 x 4 mm QFN package.

Clock Buffers, Drivers Feature Summary

• Converts single-ended input to four differential LVPECL outputs
• Supports input frequencies from 5 to 350 MHz
• Features low additive jitter (150 fs typ) and output skew (100 ps)
• Includes Loss of Signal (LOS) indicator and glitchless Output Enable (OEB)

Clock Buffers, Drivers Applications

• High-speed clock distribution
• Ethernet switch/router systems
• SONET/SDH networks
• PCI Express 2.0/3.0 interfaces

Clock Buffers, Drivers Procurement Notes

Verify the specific ordering suffix against the manufacturer's current documentation to confirm shipment media and exact configuration. The 'GM' suffix indicates tube packaging, whereas 'GMR' denotes tape and reel. Ensure the required output voltage level matches the B00226 designation for 2.5 V LVPECL drivers before finalizing procurement.

Clock Buffers, Drivers Selection Notes

Select this part when a single-ended clock source must drive multiple LVPECL loads within a 350 MHz bandwidth. The independent VDDO supply allows flexibility in setting output swing levels relative to the core logic voltage. Verify that the application requires differential LVPECL outputs rather than other formats like LVDS or CMOS available in the Si5330 family.

Clock Buffers, Drivers Part Context

This component belongs to the Si5330 family of low-jitter clock buffers. The 'K' in the part number identifies it as a variant with single-ended input capability. Other variants in the series support differential inputs or different output formats such as LVDS, HCSL, CMOS, SSTL, and HSTL. The Si5330 serves as a versatile fanout buffer and level translator for high-performance timing applications.

Clock Buffers, Drivers Replacement Considerations

Other Si5330 variants with different input/output configurations may serve as functional replacements if the signal format requirements change. For example, Si5330A provides differential input with LVPECL outputs. Direct pin-for-pin substitution is possible within the same package type, but electrical characteristics and pin usage must be verified against the specific datasheet revision.