SI53326-B-GM

Clock Buffers, Drivers Overview

The Skyworks SI53326-B-GM is a low-jitter LVPECL fanout clock buffer featuring ten differential outputs. It accepts single-ended LVCMOS inputs and supports frequencies from DC to 200 MHz. The device includes a 2:1 input multiplexer for selecting between two clock sources and provides independent output enable control. Built-in LDOs deliver high power supply rejection ratio (PSRR) performance, reducing external filtering requirements. Typical additive jitter is 50 fs rms. It operates within a temperature range of –40 °C to +85 °C and is housed in a 32-QFN package.

Clock Buffers, Drivers Feature Summary

• Ten LVPECL outputs with typical 50 fs rms additive jitter
• Single-ended LVCMOS input with 2:1 selectable input mux
• Built-in LDOs for high PSRR and simplified design
• Independent output enable functionality

Clock Buffers, Drivers Applications

• Clock distribution networks requiring low jitter
• Redundant clocking systems with source selection
• High-speed data acquisition and processing boards

Clock Buffers, Drivers Procurement Notes

Verify the specific ordering suffix against the manufacturer's current documentation to confirm package type and temperature grade. Confirm RoHS compliance status directly with the supplier or official datasheet before procurement. Ensure the single-ended LVCMOS input requirement matches the system clock source capabilities.

Clock Buffers, Drivers Selection Notes

Select this component when ten LVPECL outputs are required from a single-ended LVCMOS source. Verify that the input frequency does not exceed 200 MHz. Consider the 32-QFN package dimensions for PCB layout. Ensure the application can accommodate the built-in LDO power supply requirements for optimal noise rejection.

Clock Buffers, Drivers Part Context

This part belongs to the Si5332x family of LVPECL fanout buffers. Unlike other family members that accept universal formats, the SI53326 is restricted to single-ended LVCMOS inputs. It shares features like the 2:1 mux and built-in LDOs with the broader Si53320-28 series but offers a fixed configuration optimized for specific input/output needs.

Clock Buffers, Drivers Replacement Considerations

Direct replacements within the same family include the SI53328-B-GM, which also uses single-ended LVCMOS inputs and a 2:1 mux but provides only three outputs in a smaller 24-QFN package. Other family members require differential inputs and are not pin-compatible or functionally equivalent for single-ended applications.