SI53352A-D01AMR

Clock Buffers, Drivers Overview

The SI53352A-D01AMR is an automotive-grade, 1-input, 2-output clock buffer from the Si5335x family. It operates within a frequency range of 10–250 MHz and supports differential and single-ended output formats including LVPECL, LVDS, HCSL, and LVCMOS. The device features pin-selectable input/output configurations and includes built-in LDOs for high PSNR performance. It is AEC-Q100 qualified, rated for temperatures from –40 °C to +105 °C, and delivers typical additive phase jitter of 120 fs RMS at 156.25 MHz.

Clock Buffers, Drivers Feature Summary

• Automotive Grade 2 qualification (–40 °C to +105 °C) with AEC-Q100 and AEC-Q006 compliance
• Pin-selectable output formats: LVPECL, LVDS, HCSL, and LVCMOS via Format_SEL pins
• Low additive jitter performance: 120 fs RMS typical at 156.25 MHz
• Built-in LDOs provide high power supply noise rejection (PSNR)
• Hardware Output Enable (OE) pins for individual or paired output control

Clock Buffers, Drivers Applications

• Infotainment systems
• Advanced Driver Assistance Systems (ADAS)
• Radar sensors
• Automated driving processing units
• Networking gateways

Clock Buffers, Drivers Procurement Notes

Verify the 'R' suffix in the part number indicates tape and reel packaging as specified in the ordering guide. Confirm that the fixed-function pin-selectable configuration matches system requirements, as this variant does not support ClockBuilder Pro customization. Ensure compatibility with the required VDDO voltage levels (1.8 V, 2.5 V, or 3.3 V) for the selected output format.

Clock Buffers, Drivers Selection Notes

Select this part when a fixed 2-output buffer with pin-configurable signal formats is required. Use Format_SEL1 and Format_SEL0 pins to define the output type (LVPECL, LVDS, HCSL, or LVCMOS). Note that LVCMOS in-phase dual outputs are not recommended for new designs due to EMI/EMC considerations; complementary LVCMOS is preferred if available in other variants. Ensure the input clock frequency falls within the 10–250 MHz range.

Clock Buffers, Drivers Part Context

The SI53352A-D01AMR belongs to the Si5335x universal clock buffer family, which offers 2, 4, 8, and 10-output options. Unlike the BDxxxxx-AM variants, this D01AM version has fixed pin-selectable functionality rather than user-defined ClockBuilder Pro configurations. It shares the same automotive-grade reliability and low-jitter characteristics as its higher-output counterparts.

Clock Buffers, Drivers Replacement Considerations

For direct functional replacement with different output counts, consider SI53354A-D01AM (4 outputs), SI53358A-D01AM (8 outputs), or SI53350A-D01AM (10 outputs). For complementary LVCMOS outputs, use SI53352BD12751-AM. Pin-compatible alternatives within the same package require verification of output count and format settings.

Clock Buffers, Drivers FAQ

How is the output signal format configured on the SI53352A-D01AMR?

The output format is set using two hardware pins, Format_SEL1 and Format_SEL0. Combinations of 00, 01, 10, and 11 select LVCMOS, LVPECL, LVDS, and HCSL formats, respectively.

What is the maximum operating frequency for this device?

The SI53352A-D01AMR supports input and output frequencies ranging from 10 MHz to 250 MHz.

Does this device support Loss of Signal (LOS) monitoring?

No, the LOS monitor feature is only available on user-defined ClockBuilder Pro variants (Si5335xBDxxxxx-AM). The SI53352A-D01AMR is a fixed-function pin-selectable device without LOS capability.