SI5335A-B06124-GM

Clock Generators, PLLs, Frequency Synthesizers Overview

The Skyworks SI5335A-B06124-GM is a web-customizable, any-frequency, any-output quad clock generator and buffer. It synthesizes four non-integer-related frequencies up to 350 MHz using MultiSynth technology, ensuring 0 ppm frequency synthesis error. The device supports three independent pin-selectable configurations and features flexible output drivers compatible with LVPECL, LVDS, CML, HCSL, CMOS, SSTL, and HSTL formats. It operates on a single core supply of 1.8 V, 2.5 V, or 3.3 V, with individual output voltage selection. Key electrical parameters include a typical phase jitter of 0.7 ps RMS, a core supply current of 45 mA in PLL mode, and an operating temperature range from –40 °C to +85 °C.

Clock Generators, PLLs, Frequency Synthesizers Feature Summary

• MultiSynth fractional divider technology enables independent synthesis of four frequencies up to 350 MHz with 0 ppm error.
• Supports three independent, user-assignable, pin-selectable device configurations for system flexibility.
• Flexible input reference options including external crystals (25/27 MHz), CMOS, SSTL/HSTL, and differential inputs.
• Configurable output drivers support multiple formats (LVPECL, LVDS, CML, HCSL, CMOS, SSTL, HSTL) with independent voltage levels.

Clock Generators, PLLs, Frequency Synthesizers Applications

• PCI Express Gen 1/2/3/4 common clock generation
• Ethernet switch/router clocking
• Processor and FPGA clocking
• DSL jitter attenuation
• Broadcast video/audio timing

Clock Generators, PLLs, Frequency Synthesizers Procurement Notes

Verify the specific factory configuration encoded in the ordering suffix B06124 against the target design requirements using the ClockBuilder Pro utility. Confirm that the package marking and top marking align with the ordered part number to ensure correct revision and customization status before integration.

Clock Generators, PLLs, Frequency Synthesizers Selection Notes

Select this component when a single device must replace multiple clock generators or buffers by utilizing its three pin-selectable configurations. Ensure the required output frequencies do not exceed 350 MHz and verify compatibility with the available input reference sources. Consider the power consumption differences between PLL mode (45 mA) and buffer mode (12 mA) during thermal planning.

Clock Generators, PLLs, Frequency Synthesizers Part Context

This part belongs to the Si5335 family of highly flexible clock generators. The 'A' variant typically denotes specific performance or feature sets within the series, while the suffix indicates a custom configuration generated via Skyworks' web-based tool. It serves as a drop-in replacement for discrete oscillators and buffers in complex digital systems requiring precise clock distribution.

Clock Generators, PLLs, Frequency Synthesizers Replacement Considerations

Direct functional replacements within the same family include other Si5335 variants with different ordering suffixes that match the required frequency plan and output format. Verify pin-to-pin compatibility and electrical specifications such as supply voltage and jitter performance when substituting with other Si5335 models.