SI5335B-B05548-GMR

Overview

The Skyworks SI5335B-B05548-GMR is a web-customizable, any-frequency, any-output quad clock generator and buffer. It synthesizes four non-integer-related frequencies up to 350 MHz using MultiSynth fractional divider technology, ensuring 0 ppm frequency synthesis error. The device supports flexible input references including external crystals (25/27 MHz), CMOS, SSTL/HSTL, and differential inputs. Outputs are independently configurable for LVPECL, LVDS, CML, HCSL, CMOS, SSTL, or HSTL formats with selectable supply voltages of 1.5, 1.8, 2.5, or 3.3 V. It features low phase jitter of 0.7 ps RMS, two selectable PLL loop bandwidths (1.6 MHz or 475 kHz), and loss-of-signal alarm functionality.

Feature Summary

• MultiSynth Technology: Synthesizes four independent, non-integer-related frequencies up to 350 MHz with 0 ppm frequency error.
• Flexible I/O: Supports multiple input types (XTAL, CMOS, Differential) and output formats (LVPECL, LVDS, CML, HCSL, CMOS, SSTL, HSTL).
• Low Jitter Performance: Achieves 0.7 ps RMS random jitter in clock generator mode with 1.6 MHz loop bandwidth.
• Configurable Control: Includes up to five user-assignable pin functions for spread spectrum control, reset, and frequency plan selection.

Applications

• PCI Express Gen 1/2/3/4 common clock and jitter attenuation
• Ethernet switch/router and 1 GbE/10 GbE interfaces
• Processor and FPGA clocking systems
• DSL jitter attenuation and telecom line cards

Procurement Notes

Verify the specific configuration encoded in the ordering suffix B05548 against the system requirements using the ClockBuilder Pro utility. Confirm that the QFN-24 package dimensions and thermal characteristics meet the PCB layout constraints. Ensure the selected output voltage levels match the load requirements for LVPECL, LVDS, or CMOS drivers.

Selection Notes

Select this component when zero ppm frequency synthesis error is required across multiple output frequencies. Choose between the 1.6 MHz or 475 kHz loop bandwidth based on whether jitter attenuation or fast lock time is prioritized. Verify that the input reference source matches the supported frequency ranges (10–350 MHz for differential/SSTL/HSTL or 10–200 MHz for CMOS).

Part Context

The SI5335B-B05548-GMR belongs to the Si5335 family of highly flexible clock generators. It replaces multiple discrete clock oscillators and buffers by integrating four output banks into a single 4x4 mm QFN package. The 'GMR' suffix indicates tape and reel packaging suitable for automated surface-mount assembly.

Replacement Considerations

Direct replacements within the Si5335 family require identical electrical configurations and pin assignments. Verify that alternative part numbers support the same output voltage levels and jitter specifications. Cross-reference the specific configuration code to ensure functional equivalence without redesigning the control logic.