SI5335B-B05678-GM

Overview

The Skyworks SI5335B-B05678-GM is a web-customizable, any-frequency, any-output quad clock generator and buffer. It synthesizes four non-integer-related frequencies up to 350 MHz using MultiSynth technology, ensuring 0 ppm frequency synthesis error. The device supports three independent pin-selectable configurations and features flexible input options including external crystals (25/27 MHz), CMOS, SSTL/HSTL, and differential inputs. Outputs support LVPECL, LVDS, CML, HCSL, CMOS, SSTL, and HSTL formats with independent voltage selection of 1.5, 1.8, 2.5, or 3.3 V. It operates on a single core supply of 1.8, 2.5, or 3.3 V, draws 45 mA in PLL mode, and functions within a temperature range of –40 to +85 °C.

Feature Summary

• MultiSynth fractional divider technology enables independent synthesis of four frequencies up to 350 MHz with 0 ppm error.
• Supports three independent, user-assignable, pin-selectable device configurations for system flexibility.
• Configurable output drivers support LVPECL, LVDS, CML, HCSL, CMOS, SSTL, and HSTL formats with independent voltage levels.
• Low phase jitter performance of 0.7 ps RMS with selectable PLL loop bandwidths of 1.6 MHz or 475 kHz.

Applications

• PCI Express Gen 1/2/3/4 common clock generation
• Ethernet switch/router clocking
• Processor and FPGA clocking
• DSL jitter attenuation
• Broadcast video/audio timing

Procurement Notes

Verify the specific factory configuration encoded in the B05678 suffix via the official datasheet or ClockBuilder Pro utility, as this part number represents a customized product rather than a generic off-the-shelf component. Confirm that the required pin-selectable configurations and output formats match the pre-programmed settings, as these cannot be altered post-manufacture without ordering a new variant.

Selection Notes

Select this component when a design requires multiple distinct clock frequencies from a single package with zero ppm synthesis error. Ensure the application utilizes the supported input reference types (crystal, CMOS, or differential) and that the target output voltage levels (1.5V, 1.8V, 2.5V, or 3.3V) are compatible with the receiver devices. Verify that the required pin-selectable modes align with the available control pins (P1, P2, P3, P5, P6).

Part Context

This part belongs to the Si5335 family of highly flexible clock generators. The 'B' indicates a specific revision or feature set within the series, while the alphanumeric suffix denotes a unique factory customization. It serves as a replacement for multiple discrete clock oscillators and buffers, consolidating functionality into a single 24-QFN package to reduce board space and component count.

Replacement Considerations

Direct replacements require identical factory programming. Generic Si5335 variants may not match the specific frequency plans or pin configurations. Verify compatibility with the Si5338 if additional outputs or different interface requirements are needed, but note that the Si5338 is a separate product line with potentially different electrical characteristics.

FAQ

What is the maximum output frequency supported by the Si5335?

The device supports output frequencies up to 350 MHz for LVPECL, LVDS, CML, SSTL, and HSTL formats. HCSL outputs are supported up to 250 MHz, and CMOS outputs up to 200 MHz.

How does the device handle frequency synthesis error?

Using Skyworks' patented MultiSynth fractional divider technology, all outputs are guaranteed to have 0 ppm frequency synthesis error regardless of the configuration.

Can the device operate in both clock generator and buffer modes?

Yes, the Si5335 can be configured as either a clock generator using the PLL or as a clock buffer device by bypassing the PLL.