SI5335D-B05505-GMR

Clock Generators, PLLs, Frequency Synthesizers Overview

The SI5335D-B05505-GMR is a web-customizable, any-frequency, any-output quad clock generator and buffer manufactured by Skyworks Solutions. It synthesizes four non-integer-related frequencies up to 350 MHz using MultiSynth technology, ensuring 0 ppm frequency synthesis error. The device supports flexible input references including external crystals (25/27 MHz), CMOS, SSTL/HSTL, and differential inputs. It features independently configurable outputs supporting LVPECL, LVDS, CML, HCSL, CMOS, and SSTL/HSTL formats with selectable supply voltages of 1.5, 1.8, 2.5, or 3.3 V. The core operates on a single supply of 1.8, 2.5, or 3.3 V.

Clock Generators, PLLs, Frequency Synthesizers Feature Summary

• Four independent output banks capable of synthesizing any frequency up to 350 MHz with 0 ppm error.
• Supports three independent, pin-selectable device configurations for system flexibility.
• Low phase jitter performance of 0.7 ps RMS typical in clock generator mode.
• Flexible input options: External crystal, CMOS (10–200 MHz), SSTL/HSTL, and Differential (10–350 MHz).

Clock Generators, PLLs, Frequency Synthesizers Applications

• PCI Express Gen 1/2/3/4 common clock generation
• Ethernet switch/router clocking
• Processor and FPGA clocking
• DSL jitter attenuation
• Broadcast video/audio timing

Clock Generators, PLLs, Frequency Synthesizers Procurement Notes

Verify the specific factory configuration encoded in the B05505 suffix via the official datasheet or ClockBuilder Pro tool, as this determines the exact output frequencies and control pin mappings. Confirm the package type is 24-QFN (4x4 mm) and check RoHS compliance status. Ensure the operating temperature range meets the -40 to +85 °C requirement for the intended application environment.

Clock Generators, PLLs, Frequency Synthesizers Selection Notes

Select this component when multiple distinct clock frequencies are required from a single source with low jitter. Choose between PLL modes (1.6 MHz or 475 kHz loop bandwidth) based on jitter attenuation needs for PCIe or DSL applications. Ensure the output voltage levels (1.5V, 1.8V, 2.5V, 3.3V) match the receiving devices. Verify that the input reference signal format (Crystal, CMOS, or Differential) is compatible with the system design.

Clock Generators, PLLs, Frequency Synthesizers Part Context

This part belongs to the Si5335 family of highly flexible clock generators. The 'D' indicates a specific performance grade or configuration variant within the series, while 'B05505' denotes a unique factory-programmed frequency plan. The 'GMR' suffix typically indicates tape-and-reel packaging. It serves as a replacement for multiple discrete oscillators and buffers in complex digital systems.

Clock Generators, PLLs, Frequency Synthesizers Replacement Considerations

Direct replacements must be other Si5335 variants with identical factory programming (B05505). Generic Si5335 parts will have different default frequencies and require reconfiguration. Ensure substitute parts support the same output formats (LVPECL/LVDS/CML/etc.) and voltage levels.