SI5335D-B05874-GM

Overview

The SI5335D-B05874-GM is a web-customizable, any-frequency, any-output quad clock generator and buffer manufactured by Skyworks Solutions. It synthesizes four non-integer-related frequencies up to 350 MHz using MultiSynth technology, ensuring 0 ppm frequency synthesis error. The device supports three independent pin-selectable configurations and features flexible input references including external crystals (25/27 MHz), CMOS, SSTL/HSTL, and differential inputs. Outputs are configurable as LVPECL, LVDS, CML, HCSL, CMOS, or SSTL/HSTL with independent voltage levels of 1.5, 1.8, 2.5, or 3.3 V. It operates on a single core supply of 1.8, 2.5, or 3.3 V within an ambient temperature range of –40 to +85 °C.

Feature Summary

• Four output banks supporting any frequency up to 350 MHz with 0 ppm synthesis error
• Three independent, user-assignable, pin-selectable device configurations
• Flexible input reference: External crystal, CMOS, SSTL/HSTL, or differential (10–350 MHz)
• Configurable output drivers: LVPECL/LVDS/CML (1–350 MHz), HCSL (1–250 MHz), CMOS (1–200 MHz), SSTL/HSTL (1–350 MHz)

Applications

• PCI Express Gen 1/2/3/4 common clock and jitter attenuation
• Ethernet switch/router and 1 GbE/10 GbE interfaces
• DSL jitter attenuation and MSAN/DSLAM/PON systems
• Processor and FPGA clocking

Procurement Notes

Verify the specific factory configuration encoded in the B05874 suffix against the system requirements using the ClockBuilder Pro utility. Confirm that the required pin-selectable control functions (SSENB, RESET, OEB, FS) match the available hardware pins on the target PCB layout. Ensure the selected core supply voltage (1.8 V, 2.5 V, or 3.3 V) aligns with the power delivery network design.

Selection Notes

Select this component when multiple distinct clock frequencies are required from a single source with zero ppm error. Choose the 1.6 MHz loop bandwidth for high-speed serial standards like PCIe or the 475 kHz bandwidth for jitter attenuation applications such as DSL. Verify that the input signal format (differential vs. single-ended) matches the available CLKIN pins and that the output driver voltages meet the receiver specifications.

Part Context

This part belongs to the Si5335 family of highly flexible clock generators. The 'D' variant typically denotes specific performance or feature sets within the series, while the alphanumeric suffix defines the unique frequency plan and pin configuration programmed at the factory. It serves as a replacement for multiple discrete oscillators and buffers in complex digital systems.

Replacement Considerations

Direct replacements must be other Si5335 variants with identical pin-out and package dimensions (24-QFN). Verify that the substitute part number contains the necessary frequency plan or can be reconfigured via ClockBuilder Pro if the board allows for post-manufacturing programming.