SI5335D-B06008-GMR

Overview

The SI5335D-B06008-GMR is a web-customizable, any-frequency, any-output quad clock generator and buffer from Skyworks Solutions. It synthesizes four non-integer-related frequencies up to 350 MHz using MultiSynth fractional divider technology, ensuring 0 ppm frequency synthesis error. The device supports three independent pin-selectable configurations and features flexible input references including external crystals (25/27 MHz), CMOS, SSTL/HSTL, and differential inputs. Outputs are configurable as LVPECL, LVDS, CML, HCSL, CMOS, or SSTL/HSTL with independent voltage levels of 1.5, 1.8, 2.5, or 3.3 V. It operates on a single core supply of 1.8, 2.5, or 3.3 V within the -40 to +85 °C temperature range.

Feature Summary

• Four independent output banks supporting any frequency (< 350 MHz) and format via MultiSynth technology
• Three user-assignable, pin-selectable device configurations for replacing multiple ICs
• Low phase jitter performance (0.7 ps RMS typical) with selectable PLL loop bandwidths (1.6 MHz or 475 kHz)
• Flexible input options: External crystal, CMOS, SSTL/HSTL, or differential signals

Applications

• PCI Express Gen 1/2/3/4 common clock and jitter attenuation
• Ethernet switch/router and 1 GbE/10 GbE timing
• DSL jitter attenuation and MSAN/DSLAM/PON systems
• Processor and FPGA clocking in telecom line cards

Procurement Notes

Verify the specific ordering suffix 'GMR' indicates tape-and-reel packaging when sourcing. Confirm availability status as distribution channels may list limited stock or end-of-life conditions. Ensure the configuration file matches the required frequency plan, as this part is factory-customized. Check RoHS compliance documentation if required by local regulations.

Selection Notes

Select this model for designs requiring four distinct clock frequencies with zero ppm error. Use the ClockBuilder Pro utility to define the specific input reference and output formats. Ensure the chosen output driver voltages (1.5V, 1.8V, 2.5V, or 3.3V) match the load requirements. Verify that the selected PLL loop bandwidth suits the jitter attenuation needs of the application, such as PCIe or DSL standards.

Part Context

This component belongs to the Si5335 family of highly flexible clock generators. The 'D' variant typically denotes specific electrical characteristics or package type within the series. The 'B06008' code represents a unique factory configuration generated via Skyworks' web-based tool. The '-GMR' suffix specifies the reel packaging format for automated assembly.

Replacement Considerations

Direct replacements must support four outputs with similar frequency ranges and jitter specs. Consider Skyworks Si5335 variants with different configuration codes but identical electrical parameters. Other manufacturers offering any-frequency clock generators may require significant PCB redesign due to pinout and control logic differences.