SI5338A-B15673-GMR

Overview

The SI5338A-B15673-GMR is a programmable quad clock generator utilizing MultiSynth technology. It synthesizes any frequency on four output drivers with 0 ppm precision, replacing up to four crystal oscillators. The device supports flexible input references including external crystals (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), and differential inputs (5–710 MHz). Outputs are independently configurable for formats such as LVPECL, LVDS, HCSL, CMOS, SSTL, and HSTL, with supply voltages of 1.5, 1.8, 2.5, or 3.3 V. Key electrical parameters include a typical phase jitter of 0.7 ps RMS, core supply current of 45 mA, and operation from a single 1.8, 2.5, or 3.3 V core supply.

Feature Summary

• Low phase jitter of 0.7 ps RMS typ
• High precision synthesis allows true zero ppm frequency accuracy on all outputs
• Independent frequency increment/decrement feature enables glitchless frequency adjustments in 1 ppm steps
• Highly configurable spread spectrum (SSC) on any output: frequency from 5 to 350 MHz, spread from 0.5 to 5.0%

Applications

• Ethernet switch/router
• PCIe Gen1/2/3/4
• Processor and FPGA clocking
• Telecom line cards

Procurement Notes

Verify the specific ordering suffix B15673 against the manufacturer's official documentation to confirm the exact configuration of output frequencies, formats, and package type. Ensure compatibility with I2C/SMBus programming requirements using ClockBuilder Pro software.

Selection Notes

Select this component when independent, any-frequency synthesis is required for multiple clock domains. Verify that the target application supports the available output voltage levels (1.5V to 3.3V) and signal formats (LVPECL, LVDS, CMOS, etc.). Confirm input reference constraints match the system design, particularly for differential inputs up to 710 MHz.

Part Context

This part belongs to the Si5338 family of I2C-programmable clock generators. It is designed to replace multiple discrete oscillators and buffers, reducing board space and power consumption. The device integrates a PLL and MultiSynth dividers to generate precise clock signals for high-speed digital interfaces.

Replacement Considerations

Public confirmed substitute part numbers are not available in the provided source material.