SI5342D-B05951-GMR

Clock Generators, PLLs, Frequency Synthesizers Overview

The SI5342D-B05951-GMR is a low-jitter, 2-output jitter attenuator and clock multiplier from the Si5342 Rev D family by Skyworks Solutions. It utilizes fourth-generation DSPLL and MultiSynth technologies to generate any frequency combination from any input source. The device supports differential inputs from 8 kHz to 750 MHz and LVCMOS inputs up to 250 MHz. Output frequencies range from 100 Hz to 350 MHz for differential formats and 100 Hz to 250 MHz for LVCMOS. It features ultra-low jitter of 90 fs rms, programmable jitter attenuation bandwidth from 0.1 Hz to 4 kHz, and in-circuit programmable non-volatile memory. The component operates within a temperature range of –40 °C to +85 °C.

Clock Generators, PLLs, Frequency Synthesizers Feature Summary

• Generates any combination of output frequencies from any input frequency using fractional synthesis
• Provides ultra-low jitter performance with digitally programmable jitter attenuation bandwidth
• Supports hitless input clock switching between fractionally related sources
• Includes in-circuit programmable non-volatile memory for known power-up configuration

Clock Generators, PLLs, Frequency Synthesizers Applications

• OTN muxponders and transponders
• 10/40/100 G networking line cards
• GbE/10 GbE/100 GbE Synchronous Ethernet (ITU-T G.8262)
• Carrier Ethernet switches
• SONET/SDH line cards

Clock Generators, PLLs, Frequency Synthesizers Procurement Notes

Verify the specific ordering suffix against the manufacturer's current documentation to confirm package type and tape/reel specifications. Confirm that the factory preprogrammed configuration matches the required frequency plan, as custom part numbers are assigned based on unique numerical sequences representing the preprogrammed settings.

Clock Generators, PLLs, Frequency Synthesizers Selection Notes

Select this model when two independent output clocks are required with high jitter attenuation capabilities. Ensure the application requires an output frequency range compatible with the 'D' suffix specification (up to 350 MHz). Verify that the system can accommodate the 44-QFN 7x7 mm package dimensions and supports the necessary serial interface protocols for configuration.

Clock Generators, PLLs, Frequency Synthesizers Part Context

This component belongs to the Si5345/44/42 Rev D family, which combines DSPLL and MultiSynth technologies. While the Si5345 offers 10 outputs and the Si5344 offers 4 outputs, the Si5342 variant specifically provides 4 inputs and 2 outputs in a compact 44-QFN package, targeting applications requiring fewer channels but maintaining high-performance jitter cleaning.

Clock Generators, PLLs, Frequency Synthesizers Replacement Considerations

Si5342A-D-B05951-GMR: Offers integer and fractional synthesis up to 1028 MHz.

Clock Generators, PLLs, Frequency Synthesizers FAQ

What is the maximum output frequency supported by the Si5342D series?

The Si5342D series supports a maximum differential output frequency of 350 MHz and an LVCMOS output frequency of 250 MHz.

How does the device handle input clock loss?

The device monitors inputs for Loss of Signal (LOS) and Out-of-Frequency (OOF). If the selected input fails and no other valid inputs are available, it enters holdover mode using stored historical frequency data.

Is external loop filtering required?

No, the loop filter is fully integrated on-chip, eliminating the risk of noise coupling associated with discrete solutions.