SI5345B-B03065-GM

Clock Generators, PLLs, Frequency Synthesizers Overview

The SI5345B-B03065-GM is a factory preprogrammed, low-jitter clock multiplier and jitter attenuator from the Si5345 family. It features four inputs and ten outputs housed in a 64-QFN package. The device supports differential input frequencies up to 750 MHz and LVCMOS inputs up to 250 MHz. Output frequencies range from 100 Hz to 350 MHz for differential formats and up to 250 MHz for LVCMOS. It operates on a core voltage of 1.8 V ±5% and I/O voltages of 3.3 V, 2.5 V, or 1.8 V. The component functions within a temperature range of –40 °C to +85 °C.

Clock Generators, PLLs, Frequency Synthesizers Feature Summary

• Generates any combination of output frequencies from any input frequency using fourth-generation DSPLL technology.
• Provides ultra-low jitter performance with digitally programmable jitter attenuation bandwidth.
• Supports hitless input clock switching between fractionally related clocks.
• Includes in-circuit programmable non-volatile memory for known power-up configuration.

Clock Generators, PLLs, Frequency Synthesizers Applications

• OTN muxponders and transponders
• 10/40/100 G networking line cards
• GbE/10 GbE/100 GbE Synchronous Ethernet (ITU-T G.8262)
• Carrier Ethernet switches
• SONET/SDH line cards

Clock Generators, PLLs, Frequency Synthesizers Procurement Notes

Verify the specific factory preprogrammed configuration associated with the B03065 suffix against project requirements. Confirm that the 64-QFN package dimensions match the PCB land pattern. Ensure the serial interface protocol matches the system controller. Validate thermal management for the QFN-64 enclosure under maximum load conditions.

Clock Generators, PLLs, Frequency Synthesizers Selection Notes

Select this model when fractional synthesis is required alongside jitter attenuation for high-speed networking applications. The Si5345B variant restricts output frequencies to 350 MHz, suitable for standard synchronization standards. Use ClockBuilder Pro software to verify the preprogrammed settings align with the target frequency plan before integration.

Clock Generators, PLLs, Frequency Synthesizers Part Context

This component belongs to the Si5345 family of jitter attenuators. The 'B' designation indicates a maximum output frequency limit of 350 MHz, distinguishing it from the 'A' and 'C' variants which support higher frequencies. The 'D' signifies the Rev D datasheet revision. The 'GM' suffix denotes the lead-free, RoHS-compliant 64-QFN package type.

Clock Generators, PLLs, Frequency Synthesizers Replacement Considerations

SI5345B-D-GM: Generic version requiring custom programming.

Clock Generators, PLLs, Frequency Synthesizers FAQ

What is the purpose of the B03065 suffix?

It identifies a specific factory preprogrammed configuration assigned by Skyworks Solutions, Inc., rather than a generic hardware variant.

Does the device support gapped clock inputs?

Yes, the DSPLL can lock to gapped clock inputs with a minimum frequency of 10 MHz and up to two missing cycles out of every eight.

How is input switching handled?

The device supports manual, automatic, hitless, ramped, and glitchless input switching modes controlled via registers or pins.