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— IC芯片 | 连接器 | 传感器 | 被动器件 —
SI5345B-B05791-GM is listed in the Clock Generators, PLLs, Frequency Synthesizers range at ChipApex. The manufacturer field lists Skyworks Solutions Inc.. Its product description is IC CLK MULTIPLIER ATTENUATOR. Review the specifications below when checking this part for your BOM.
The Skyworks SI5345B-B05791-GM is a 10-output jitter attenuator and clock multiplier utilizing fourth-generation DSPLL and MultiSynth technologies. It supports any-frequency generation with an ultra-low jitter of 90 fs rms. The device features four inputs (differential: 8 kHz–750 MHz; LVCMOS: 8 kHz–250 MHz) and ten outputs (differential: 100 Hz–350 MHz; LVCMOS: 100 Hz–250 MHz). It operates on a core voltage of 1.8 V ±5% and output supplies of 3.3 V, 2.5 V, or 1.8 V. The component is housed in a 64-QFN package and functions within a temperature range of –40 to +85 °C.
Verify the specific ordering suffix against the manufacturer's current documentation to confirm factory preprogramming details. Confirm package availability and lead times through authorized distributors. Ensure compliance with RoHS-6 standards and check for moisture sensitivity level requirements during storage and handling.
Select this model when low jitter performance and flexible output configurations are required. Verify that the differential output frequency range up to 350 MHz meets system needs. Consider the integrated loop filter and digital programmability for simplified design compared to discrete solutions.
This part belongs to the Si5345 family, which includes variants like the Si5345A and Si5345C offering different frequency ranges and synthesis modes. The Si5345B specifically targets applications requiring up to 350 MHz differential outputs. It shares the same 64-QFN footprint and functional architecture as other family members.
Public confirmed substitute part numbers include SI5345B-D-GM.
The Si5345B supports a maximum differential output frequency of 350 MHz.
Yes, the DSPLL supports locking to gapped input clocks, provided they meet minimum frequency and missing cycle specifications.
The loop bandwidth is digitally programmable via registers, allowing settings between 0.1 Hz and 4 kHz for jitter attenuation optimization.
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