Clock Generators, PLLs, Frequency Synthesizers SI5345B-B07024-GMR product image

SI5345B-B07024-GMR

$18.41
  • Description:IC CLOCK GENERATOR
  • Series:*

SKU:917746598464 Category: Brand:

  
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SI5345B-B07024-GMR is listed in the Clock Generators, PLLs, Frequency Synthesizers range at ChipApex. The manufacturer field lists Skyworks Solutions Inc.. Its product description is IC CLOCK GENERATOR. Review the specifications below when checking this part for your BOM.

Clock Generators, PLLs, Frequency Synthesizers specifications for SI5345B-B07024-GMR

  • Description:IC CLOCK GENERATOR
  • Series:*
  • Package:Tape & Reel (TR)
  • Mfr:Skyworks Solutions Inc.
  • PLL:-
  • Input:-
  • Output:-
  • Number of Circuits:-
  • Ratio - Input:Output:-
  • Differential - Input:Output:-
  • Frequency - Max:-
  • Divider/Multiplier:-
  • Voltage - Supply:-
  • Operating Temperature:-
  • Mounting Type:-
  • Package / Case:-
  • Supplier Device Package:-
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Clock Generators, PLLs, Frequency Synthesizers datasheet and documents for SI5345B-B07024-GMR

SI5345B-B07024-GMR

Clock Generators, PLLs, Frequency Synthesizers Overview

The SI5345B-B07024-GMR is a clock synthesizer and jitter cleaner from Skyworks Solutions, part of the Si5345 family. It features four inputs and ten outputs housed in a 64-QFN package. The device generates any combination of output frequencies from any input frequency, supporting differential inputs up to 750 MHz and LVCMOS inputs up to 250 MHz. Output frequencies range from 100 Hz to 350 MHz for differential signals and 100 Hz to 250 MHz for LVCMOS. It operates on a core voltage of 1.8 V ±5% and an auxiliary voltage of 3.3 V ±5%, with independent output supplies configurable at 3.3 V, 2.5 V, or 1.8 V.

Clock Generators, PLLs, Frequency Synthesizers Feature Summary

  • Combines fourth-generation DSPLL and MultiSynth technologies for ultra-low jitter performance and any-frequency generation.
  • Supports free-run, synchronous, and holdover modes with automatic or manual hitless input clock switching.
  • Features digitally programmable jitter attenuation bandwidth and integrated loop filter to eliminate discrete noise coupling risks.
  • Includes in-circuit programmable non-volatile memory for known power-up configuration and status monitoring capabilities.

Clock Generators, PLLs, Frequency Synthesizers Applications

  • OTN muxponders and transponders
  • 10/40/100 G networking line cards
  • GbE/10 GbE/100 GbE Synchronous Ethernet (ITU-T G.8262)
  • Carrier Ethernet switches
  • SONET/SDH line cards

Clock Generators, PLLs, Frequency Synthesizers Procurement Notes

Verify the specific factory preprogrammed configuration associated with the B07024 suffix against project requirements using ClockBuilder Pro software. Confirm that the QFN-64 package dimensions and thermal characteristics match the PCB layout specifications. Ensure the serial interface protocol matches the system controller capabilities before finalizing procurement.

Clock Generators, PLLs, Frequency Synthesizers Selection Notes

Select this model when applications require ten low-jitter outputs with frequencies capped at 350 MHz. The Si5345B variant is suitable for designs needing flexible input synchronization and glitchless frequency changes. Verify that the required output signal formats (LVDS, LVPECL, LVCMOS, CML, HCSL) align with the programmable amplitude settings available in the device.

Clock Generators, PLLs, Frequency Synthesizers Part Context

This component belongs to the Si5345 Rev D family, which integrates DSPLL and MultiSynth technologies. The 'B' designation indicates a maximum output frequency limit of 350 MHz, distinguishing it from the 'A' and 'C' variants that support higher frequencies or integer-only synthesis. The 'GMR' suffix denotes tape and reel packaging for surface-mount assembly.

Clock Generators, PLLs, Frequency Synthesizers Replacement Considerations

Si5345A-Dxxxxx-GMR

Clock Generators, PLLs, Frequency Synthesizers FAQ

What is the maximum output frequency supported by the Si5345B series?

The Si5345B series supports a maximum differential output frequency of 350 MHz and an LVCMOS output frequency of 250 MHz.

How does the device handle input clock failures?

The device automatically enters holdover mode if the selected input clock becomes invalid and no other valid inputs are available, using stored historical frequency data to minimize phase disturbance.

Can the device switch between input clocks without glitches?

Yes, the device supports hitless switching for fractionally related inputs and glitchless switching for inputs within ±500 ppm of each other.

SI5345B-B07024-GMRSI5345B-B07024-GMR
$18.41
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