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SI5345D-B03696-GMR is listed in the Clock Generators, PLLs, Frequency Synthesizers range at ChipApex. The manufacturer field lists Skyworks Solutions Inc.. Its product description is IC CLK MULTIPLIER ATTENUATOR. Review the specifications below when checking this part for your BOM.
The SI5345D-B03696-GMR is a factory preprogrammed clock multiplier and jitter attenuator from the Si5345 Rev D family. It features four inputs and ten outputs, supporting output frequencies up to 350 MHz with integer and fractional synthesis modes. The device utilizes fourth-generation DSPLL technology to achieve ultra-low jitter of 90 fs rms. It operates on a core voltage (VDD) of 1.8 V ±5% and an analog supply (VDDA) of 3.3 V ±5%. The component is housed in a 64-QFN package measuring 9x9 mm and supports an operating temperature range of -40 to +85 °C.
Verify the specific factory preprogrammed configuration associated with the suffix B03696 against the target design requirements. Confirm that the 350 MHz maximum output frequency aligns with system needs. Ensure the serial interface protocol matches the host controller capabilities.
Select this part when low jitter attenuation is critical for high-speed data transmission applications. The Si5345D variant specifically limits output frequencies to 350 MHz, distinguishing it from higher-frequency variants like the Si5345A. Use ClockBuilder Pro software to validate the preprogrammed settings or request custom configurations if the standard code does not meet specific frequency plans.
This component belongs to the Si5345/44/42 Rev D series, which integrates MultiSynth and DSPLL technologies. The Si5345 model specifically provides four inputs and ten outputs in a 64-pin QFN package. The 'D' designation indicates support for output frequencies up to 350 MHz with both integer and fractional synthesis modes.
Si5345B-D-GMR
The Si5345D variant supports output frequencies ranging from 100 Hz to 350 MHz.
The device automatically enters holdover mode using stored historical frequency data when the selected input clock becomes invalid and no other valid inputs are available.
No, the loop filter is fully integrated on-chip, eliminating the need for discrete components and reducing noise coupling risks.
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