SI5346A-B04669-GMR

Clock Generators, PLLs, Frequency Synthesizers Overview

The Si5346A-B04669-GMR is a dual DSPLL jitter attenuator in a 44-QFN package. It features two independent DSPLLs with four inputs and four outputs. Input frequency ranges include differential (8 kHz to 750 MHz), LVCMOS (8 kHz to 250 MHz), and external crystal (25–54 MHz). Output frequencies reach up to 720 MHz for differential and 250 MHz for LVCMOS. The device achieves ultra-low jitter of 95 fs rms. Supply voltages are VDD at 1.8 V ±5% and VDDA at 3.3 V ±5%. Operating temperature spans –40 to +85 °C.

Clock Generators, PLLs, Frequency Synthesizers Feature Summary

• Dual independent DSPLLs enable any-frequency conversion from any input source
• Ultra-low jitter performance of 95 fs rms ensures high signal integrity
• Flexible crosspoint routing allows any input to connect to any output driver
• Supports automatic hitless switching and programmable holdover modes

Clock Generators, PLLs, Frequency Synthesizers Applications

• OTN Muxponders and Transponders
• 10/40/100G network line cards
• GbE/10 GbE/100 GbE Synchronous Ethernet (ITU-T G.8262)
• Carrier Ethernet switches
• Broadcast video systems

Clock Generators, PLLs, Frequency Synthesizers Procurement Notes

Verify the specific ordering suffix against the manufacturer's current documentation to confirm factory pre-programmed configuration details. Ensure the component matches the required RoHS-6 compliance and lead-free specifications for your assembly process. Cross-reference the unique numerical sequence ID assigned by ClockBuilder Pro software to validate the exact part revision and functional parameters.

Clock Generators, PLLs, Frequency Synthesizers Selection Notes

Select this model when a compact form factor with dual independent timing paths is required. The Si5346 provides four inputs and four outputs, suitable for applications needing multiple synchronized clock domains within a smaller footprint compared to the quad version. Verify that the maximum output frequency requirements align with the specific grade capabilities defined in the datasheet.

Clock Generators, PLLs, Frequency Synthesizers Part Context

This component belongs to the Skyworks Si534x family of jitter attenuators utilizing fourth-generation DSPLL technology. The Si5346 variant specifically offers a dual DSPLL architecture housed in a 44-lead 7x7 mm QFN package. It serves as a lower-pin-count alternative to the Si5347 while maintaining similar core functionality and jitter performance characteristics.

Clock Generators, PLLs, Frequency Synthesizers Replacement Considerations

The Si5347 series devices offer quad DSPLL capabilities but require a larger 64-QFN package. Direct pin-to-pin substitution is not possible due to the different package footprints and pin counts. Evaluate system space constraints and the necessity for additional independent clock domains before considering the Si5347 as an alternative.