SI5346B-B03083-GM

Clock Generators, PLLs, Frequency Synthesizers Overview

The SI5346B-B03083-GM is a factory pre-programmed clock synthesizer and jitter cleaner from Skyworks Solutions. It features two independent Dual-Source Phase-Locked Loops (DSPLLs) housed in a 44-pin QFN package. The device supports any-frequency conversion with an output frequency range up to 350 MHz for differential outputs and 250 MHz for LVCMOS. It accepts input frequencies ranging from 8 kHz to 750 MHz via differential or LVCMOS interfaces, or 25–54 MHz via external crystal. Key electrical parameters include a core supply voltage of 1.8 V ±5% and independent output supplies of 3.3 V, 2.5 V, or 1.8 V. It operates within a temperature range of -40 °C to +85 °C.

Clock Generators, PLLs, Frequency Synthesizers Feature Summary

• Dual DSPLL architecture providing independent timing paths with flexible crosspoint routing between inputs and outputs.
• Ultra-low jitter performance with typical RMS values under 100 fs across the specified bandwidth.
• Supports hitless input switching and automatic holdover modes to maintain signal integrity during source transitions.
• In-circuit programmable non-volatile memory ensures known configuration upon power-up.

Clock Generators, PLLs, Frequency Synthesizers Applications

• OTN Muxponders and Transponders
• 10/40/100G network line cards
• GbE/10 GbE/100 GbE Synchronous Ethernet (ITU-T G.8262)
• Carrier Ethernet switches

Clock Generators, PLLs, Frequency Synthesizers Procurement Notes

Verify the specific factory pre-programmed configuration associated with the suffix B03083 against the target design requirements before procurement. Confirm that the ordering suffix corresponds to the intended frequency plan and pinout settings as defined by the ClockBuilder Pro software. Ensure compatibility with the required serial interface protocol and voltage levels.

Clock Generators, PLLs, Frequency Synthesizers Selection Notes

Select this model when dual independent PLLs are required within a compact 44-QFN footprint. The 'B' grade indicates a maximum output frequency limit of 350 MHz; choose the 'A' grade if frequencies up to 720 MHz are necessary. Verify that the pre-programmed configuration meets the specific jitter attenuation and input/output frequency needs without requiring extensive reconfiguration.

Clock Generators, PLLs, Frequency Synthesizers Part Context

This component belongs to the Si5346 family, which utilizes fourth-generation DSPLL technology. It serves as a lower-pin-count alternative to the Si5347, offering two DSPLLs instead of four while maintaining similar jitter performance and feature sets. The part is designed for high-integration timing solutions in telecommunications and networking infrastructure.

Clock Generators, PLLs, Frequency Synthesizers Replacement Considerations

Direct functional replacements include other Si5346 variants such as SI5346A-D-GM for higher frequency support, or SI5347 models for additional PLL channels. Ensure that any substitute matches the package dimensions and pinout to avoid PCB redesign.

Clock Generators, PLLs, Frequency Synthesizers FAQ

What is the difference between the Si5346A and Si5346B grades?

The Si5346A supports differential output frequencies up to 720 MHz, whereas the Si5346B is limited to a maximum differential output frequency of 350 MHz.

How does the device handle input clock failure?

The device automatically enters Holdover Mode using stored historical frequency data if the selected input clock fails, ensuring continuous output generation until a valid input is restored.

Can the device switch between inputs without glitches?

Yes, it supports hitless switching for frequency-locked inputs and glitchless switching for inputs with slight frequency differences, preventing runt pulses at the output.