SI5347D-D06461-GM

Clock Generators, PLLs, Frequency Synthesizers Overview

The SI5347D-D06461-GM is a jitter-attenuating clock multiplier featuring four independent Dual-Source Phase-Locked Loops (DSPLLs). It supports any-frequency conversion with an output frequency range of 0.0001 MHz to 350 MHz. The device integrates eight outputs in a 64-QFN package, accepting differential inputs from 8 kHz to 750 MHz and LVCMOS inputs up to 250 MHz. It delivers ultra-low jitter performance of 95 fs rms within the 12 kHz to 20 MHz bandwidth. Power requirements include a core voltage of 1.8 V ±5% and independent output supplies of 3.3, 2.5, or 1.8 V.

Clock Generators, PLLs, Frequency Synthesizers Feature Summary

• Integrates four independent DSPLLs for flexible timing path generation
• Supports hitless input switching between frequency-locked sources
• Includes automatic holdover modes to maintain timing during input loss
• Features programmable loop bandwidths for optimized jitter attenuation

Clock Generators, PLLs, Frequency Synthesizers Applications

• OTN Muxponders and Transponders
• 10/40/100G network line cards
• GbE/10 GbE/100 GbE Synchronous Ethernet (ITU-T G.8262)
• Carrier Ethernet switches
• Broadcast video systems

Clock Generators, PLLs, Frequency Synthesizers Procurement Notes

Verify the specific ordering suffix against the manufacturer's current datasheet to confirm the exact frequency plan and factory pre-programming configuration associated with the numerical sequence. Ensure compatibility with the required serial interface protocol and power supply voltages before integration into the design.

Clock Generators, PLLs, Frequency Synthesizers Selection Notes

Select this component when multiple independent low-jitter clock domains are required from various input sources. The Si5347D grade specifically limits the maximum output frequency to 350 MHz, which suits applications not requiring higher frequencies. Utilize ClockBuilder Pro software to configure the non-volatile memory for the desired frequency synthesis and switching behavior.

Clock Generators, PLLs, Frequency Synthesizers Part Context

This part belongs to the Si5347 family of dual/quad DSPLL jitter attenuators. The 'D' designation indicates a specific output frequency limit compared to other grades like 'A' or 'C'. It shares the same 64-QFN package and functional architecture as other Si5347 variants but differs in its specified operational frequency ranges.

Clock Generators, PLLs, Frequency Synthesizers Replacement Considerations

Direct replacements include other Si5347 grades such as SI5347A-D-GM or SI5347C-D-GM if higher output frequencies are acceptable. The Si5346 series offers a similar function with only two DSPLLs and four outputs in a smaller package.