SI5361B-A15690-GMR

Clock Generators, PLLs, Frequency Synthesizers Overview

The SI5361B-A15690-GMR is an 18-output jitter attenuator and clock multiplier from Skyworks Solutions. It integrates a single fifth-generation DSPLL and one MultiSynth, supporting output frequencies up to 1.3 GHz. The device accepts differential inputs from 8 kHz to 1000 MHz or LVCMOS inputs up to 250 MHz. It features ultra-low phase jitter performance of less than 55 fs typical RMS in integer mode. Power supplies include VDD18 at 1.71–1.89 V and VDDA/VDDXO at 3.14–3.47 V. Operating temperature ranges from -40°C to +95°C ambient. The component is housed in a 72-lead QFN package measuring 10x10 mm.

Clock Generators, PLLs, Frequency Synthesizers Feature Summary

• Integrates fifth-generation DSPLL and MultiSynth technologies for high-performance clock generation
• Supports enhanced hitless switching to minimize output phase transients during input clock changes
• Provides flexible input options with independent crystal or XO reference capabilities
• Includes in-circuit programmable non-volatile memory for known frequency configuration on power-up

Clock Generators, PLLs, Frequency Synthesizers Applications

• 56G/112G/224G PAM4 SerDes clocking
• OTN muxponders and transponders
• 100/200/400/600/800G networking line cards
• Datacenter Switches
• 100G/200G/400G Optical Transceivers

Clock Generators, PLLs, Frequency Synthesizers Procurement Notes

Verify the specific ordering suffix against the manufacturer's current datasheet to confirm interface protocol and factory programming status. Ensure the supply chain source provides valid RoHS compliance documentation. Confirm that the received components match the specified 72-QFN package dimensions and thermal characteristics before integration into the design.

Clock Generators, PLLs, Frequency Synthesizers Selection Notes

Select this model when a single PLL architecture with one MultiSynth is sufficient for the target frequency plan. Verify that the required output frequency does not exceed the 1.3 GHz limit defined for the B-grade variant. Consider the extended temperature range if the application operates in environments exceeding standard commercial limits. Evaluate the serial interface requirements against the supported SPI and I2C protocols.

Clock Generators, PLLs, Frequency Synthesizers Part Context

This component belongs to the Si536x family of jitter attenuators, which also includes the Si5362 and Si5363 variants. These devices share pin compatibility and utilize similar ClockBuilder Pro configuration software. The Si5361B specifically offers a balance of integration with one DSPLL and one MultiSynth, distinguishing it from the A-grade version which includes two MultiSynths.

Clock Generators, PLLs, Frequency Synthesizers Replacement Considerations

The Si5361A-Axxxxx-GM is a pin-compatible alternative offering two MultiSynths instead of one. Designers must verify that the additional MultiSynth resources are necessary and that the electrical specifications remain compatible with the existing circuit layout.