SII163BCTG100

Video Processing Overview

The SiI 163B is a DVI 1.0 compliant PanelLink receiver manufactured by Silicon Image, Inc., designed for high-resolution displays up to UXGA and beyond. It supports dual-link DVI configurations with two devices acting as master and slave, achieving total bandwidths up to 330 megapixels per second. The device operates on a scalable CMOS architecture with a 3.3V core voltage, consuming a maximum current of 280mA. It features a 100-pin TQFP package and includes differential signal data pins (RX0+/RX0-, RX1+/RX1-, RX2+/RX2-) and a differential clock input (RXC+/RXC-). Key specifications include support for twisted-pair cables over 5m, fiber-optic readiness, and automatic standby mode entry via clock detect circuitry.

Video Processing Feature Summary

• Supports Dual-Link DVI configurations using master and slave device coordination for extended resolution capabilities.
• Integrates Sync Detect (SCDT) functionality to facilitate Plug & Display hot plugging operations.
• Features automatic power management with low-power standby mode triggered by clock detect circuitry.
• Provides cable distance support exceeding 5 meters with twisted-pair connections and fiber-optic readiness.

Video Processing Applications

• High-resolution display interfaces supporting UXGA and higher resolutions
• Dual-link DVI system implementations requiring master-slave synchronization
• Plug-and-display applications utilizing Sync Detect hot-plugging features

Video Processing Procurement Notes

Verify the manufacturer designation carefully, as this component originates from Silicon Image, Inc., not Lattice Semiconductor Corporation. Confirm the specific datasheet revision (SiI-DS-0055-C) matches your design requirements. Ensure compatibility with DVI 1.0 standards and verify that the 100-pin TQFP package dimensions align with your PCB layout constraints before procurement.

Video Processing Selection Notes

Select this receiver when designing systems requiring DVI 1.0 compliance with dual-link expansion capabilities. Consider its low-power standby mode and Sync Detect features for applications prioritizing energy efficiency and user-friendly connectivity. Evaluate the 100-pin TQFP package size against available board space and ensure thermal management strategies account for the specified junction-to-ambient resistance values during operation.

Video Processing Part Context

This component belongs to the PanelLink Digital technology family developed by Silicon Image, Inc. It serves as a receiver counterpart to PanelLink transmitters, simplifying PC and display interface designs by resolving high-speed mixed-signal system issues. The technology ensures logical interface stability across generations, allowing designers to leverage established ecosystem resources while maintaining cost-effective and rapid time-to-market solutions for digital video applications.

Video Processing Replacement Considerations

Consult the datasheet section 'Differences Between SiI 161A and SiI 163B' for pinout variations. Verify functional equivalence if substituting with other PanelLink receivers, ensuring support for required resolution bandwidths and dual-link synchronization protocols remains intact without altering the master-slave configuration logic.

Video Processing FAQ

How does the SiI 163B handle dual-link DVI synchronization?

In dual-link mode, two SiI 163B devices are configured as master and slave. At frequencies up to 165 MHz, the master outputs two pixels per clock. Above 165 MHz, the master outputs even pixels while the slave outputs odd pixels, synchronized by a single Data Enable output from the master.

What is the function of the SCDT pin?

The Sync Detect (SCDT) signal indicates when active video is present and the TMDS PLL has locked. It can trigger external circuitry or be tied to the PD# pin to automatically place the device in power-down mode when no signal is detected.