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The SMUN5311DW1T1G is a dual Bias Resistor Transistor (BRT) from onsemi, integrating one NPN and one PNP silicon transistor with monolithic bias resistor networks in a single SOT-363 package. It features a maximum collector-emitter voltage of 50 V and a continuous collector current of 100 mA per device. The typical input resistance is 10 kΩ with a base-emitter resistance of 10 kΩ, yielding a typical resistor ratio of 1. Total power dissipation reaches 256 mW at 25°C ambient temperature. The component operates within a temperature range of -55°C to +150°C and holds AEC-Q100 qualification for automotive applications.
Verify the specific ordering suffix against official onsemi documentation to confirm package type and tape-and-reel specifications. Ensure compliance with RoHS directives and halogen-free requirements as stated in the manufacturer's material declaration. Confirm that the AEC-Q100 qualification status aligns with the intended application environment before finalizing procurement orders.
Select this component when a complementary NPN/PNP pair with integrated biasing is required in a minimal footprint. The 10 kΩ input resistance suits standard logic levels. Verify thermal constraints against the 256 mJ total dissipation rating. Consider the SOT-363 pinout compatibility with existing PCB footprints during the design phase.
This part belongs to the MUN5311DW1 series of dual BRTs. It shares the SOT-363 form factor with other variants like SMUN5315DW1T1G but differs in internal resistor values and transistor configurations. The 'S' prefix typically denotes specific automotive or controlled manufacturing site requirements within the onsemi portfolio.
Publicly confirmed substitute part numbers are not available in the provided source data. Cross-reference with NSVMUN5311DW1T1G or LMUN5311DW1T1G only if their datasheets explicitly verify identical electrical parameters and pinouts.