SN74ALS373ADB

Overview

The SN74ALS373ADB is an octal transparent D-type latch with 3-state outputs from the Texas Instruments ALS logic family. It integrates eight latches in a single package, featuring buffered control inputs and pnp inputs to reduce DC loading on data lines. The device operates within a supply voltage range of 4.5 V to 5.5 V and supports an operating temperature range of 0°C to 70°C. Propagation delay times vary between 2 ns and 19 ns depending on input-to-output paths. Low-level output current reaches up to 24 mA, while high-level output current is specified at -2.6 mA.

Feature Summary

• Features three-state bus-driving true outputs designed for driving highly capacitive or low-impedance loads without interface components.
• Includes a buffered output-enable input that places outputs in normal logic states or high-impedance state without affecting internal latch operations.
• Provides full parallel access for loading and utilizes pnp inputs to minimize DC loading on data lines.

Applications

• Implementing buffer registers
• I/O ports
• Bidirectional bus drivers
• Working registers

Procurement Notes

Verify the specific ordering suffix against the manufacturer's Package Option Addendum to confirm the exact physical package type, as standard designations may map to different form factors such as SOIC or SSOP. Confirm RoHS compliance status and lead finish specifications directly from the latest production data documentation before finalizing procurement orders.

Selection Notes

Select this component when designing systems requiring octal data storage with tri-state bus interfacing capabilities. Ensure the application environment remains within the 0°C to 70°C operating temperature range. Verify that the required propagation delays align with the system timing constraints defined in the switching characteristics table.

Part Context

This part belongs to the SN74ALS373A series of octal transparent D-type latches with 3-state outputs. It shares functional similarities with the SN54ALS373A and SN74AS373 variants but differs in performance metrics and commercial temperature ratings. The device is categorized under general-purpose logic ICs suitable for digital memory and bus management applications.

Replacement Considerations

SN74ALS373ADWR

FAQ

How does the output-enable input affect internal latch operations?

The buffered output-enable input can place the eight outputs in either a normal logic state or a high-impedance state. This action does not affect the internal operations of the latches, allowing old data to be retained or new data to be entered while the outputs are off.

What is the function of the latch-enable input?

While the latch-enable input is high, the Q outputs follow the data inputs. When the latch-enable input is taken low, the Q outputs are latched at the logic levels set up at the D inputs.