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Product Detailed Parameters
- Description：IC INVERTER 3CH 3-INP 8UQFN
- Series：74AUP
- Mfr：Texas Instruments
- Package：Tape & Reel (TR),Cut Tape (CT)
- Logic Type：Inverter
- Number of Circuits：3
- Number of Inputs：3
- Features：-
- Voltage - Supply：0.8V ~ 3.6V
- Current - Quiescent (Max)：500 nA
- Current - Output High, Low：4mA, 4mA
- Input Logic Level - Low：0.7V ~ 0.9V
- Input Logic Level - High：1.6V ~ 2V
- Max Propagation Delay @ V, Max CL：6.2ns @ 3.3V, 30pF
- Operating Temperature：-40°C ~ 85°C
- Mounting Type：Surface Mount
- Supplier Device Package：8-UQFN (1.5x1.5)
- Package / Case：8-UFQFN
- Grade：-
- Qualification：-
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Overview
The SN74AUP3G04RSER is a low-power triple inverter gate from the Texas Instruments AUP logic family. It operates within a supply voltage range of 0.8 V to 3.6 V and features I/O tolerance up to 3.6 V, supporting mixed-mode operations. The device is housed in an 8-pin UQFN (1.5x1.5 mm) package. Key electrical parameters include a maximum propagation delay of 6.2 ns at 3.3 V with 30 pF load, static current of 500 nA, and an operating temperature range of -40°C to +85°C.
Feature Summary
- Optimized for low-power consumption in portable applications
- Supports mixed-mode signal processing across 3.3-V I/O interfaces
- Compact NanoStar package design for space-constrained layouts
Applications
- Portable consumer electronics
- Battery-powered devices
- Mixed-signal system interfacing
Procurement Notes
Verify the specific suffix RSER corresponds to the UQFN-8 package and tape-and-reel shipping configuration. Confirm RoHS compliance status through official manufacturer documentation prior to integration. Ensure input voltage levels remain within the specified 0.8-V to 3.6-V operational window to maintain signal integrity and prevent device damage during operation.
Selection Notes
Select this component when minimizing power consumption is critical alongside maintaining compatibility with 3.6-V systems. The UQFN package offers a small footprint suitable for dense PCB designs. Compare propagation delay specifications against system timing requirements to ensure adequate performance margins for high-speed digital signaling applications.
Part Context
This part belongs to the SN74AUP3Gxx series of triple logic gates. The AUP family provides superior speed-to-power efficiency compared to older CMOS technologies. The '04' designation indicates inverter functionality, while '3G' specifies three independent channels within a single compact integrated circuit package.
Replacement Considerations
Direct substitutes include other SN74AUP3G04 variants such as SN74AUP3G04DCUR or SN74AUP3G04RSER.B, provided pinout and package dimensions match. Verify that alternative packages maintain identical electrical characteristics and thermal performance for seamless integration.
