SY87739LHG

Application Specific Clock/Timing Overview

The SY87739L is a protocol-transparent, fractional-N frequency synthesizer designed for serial data streaming applications. It generates differential PECL output frequencies ranging from 10MHz to 729MHz using a single 27MHz reference oscillator. The device supports common transport protocols with or without forward error correction (FEC) and enables the Micrel SY87721L CDR to lock onto any baud rate between 28Mbps and 2.7Gbps. Configuration is managed via a MicroWire interface. Operating ratings specify a supply voltage of +3.3V ±5% and an ambient temperature range of –40°C to +85°C.

Application Specific Clock/Timing Feature Summary

• Protocol-transparent fractional-N synthesizer generating 10MHz to 729MHz from a 27MHz reference
• Generates exact frequencies for protocols including OC-1, OC-3, OC-12, OC-48, ATM, Gigabit Ethernet, Fast Ethernet, Fibre Channel, 1394, InfiniBand, and proprietary optical transport
• Exceeds BellCore and ITU jitter generation specifications
• Programmable via standard 3-wire MicroWire interface

Application Specific Clock/Timing Applications

• Metro access systems
• Transponders
• Multiplexers: access, Add Drop Mux
• SONET/SDH/ATM-based transmission systems, modules and test equipment
• Broadband cross-connects
• Fiber optic test equipment

Application Specific Clock/Timing Procurement Notes

Verify package type and lead finish when ordering. The SY87739LHI variant uses Sn-Pb lead finish, while the SY87739LHY variant features Matte-Sn Pb-Free plating with a bar line indicator. Tape and reel options are available for both variants. Ensure the selected part number matches the required environmental compliance and packaging format for the specific design implementation.

Application Specific Clock/Timing Selection Notes

Select the appropriate divider settings (DivSel, PostDivSel, NdivSel, MdivSel) based on the target output frequency and protocol requirements. The fractional-N VCO operating range is 540MHz to 729MHz; ensure the calculated division ratios keep the VCO within these limits. Use the recommended external loop filter values shown in Figure 4 of the datasheet to optimize loop bandwidth and stability for the specific application.

Application Specific Clock/Timing Part Context

The SY87739L belongs to the AnyClock family of frequency synthesizers. It is specifically engineered to provide reference clocks for downstream clock and data recovery (CDR) devices, such as the SY87721L. Its architecture utilizes a tandem PLL system combining a fractional-N synthesizer with a wrapper synthesizer to handle complex protocol overheads and FEC codes accurately.

Application Specific Clock/Timing Replacement Considerations

Public confirmed substitute part numbers are not provided in the source material.