TS68EN360VA25L

Overview

The TS68EN360 is a 32-bit Quad Integrated Communication Controller (QUICC) microprocessor based on the CPU32+ core. It operates at system frequencies up to 25 MHz or 33 MHz with a +5V supply voltage. The device integrates four Serial Communications Controllers (SCCs), two Serial Management Controllers (SMCs), and one Serial Peripheral Interface (SPI). Key features include a Communications Processor Module (CPM), System Integration Module (SIM60), dual Independent DMAs, four general-purpose timers, and a DRAM controller. It supports MIL-STD-883 Class B screening and operates within a military temperature range of -55°C to +125°C.

Feature Summary

• Integrates a CPU32+ processor core with full compatibility to the CPU32 instruction set and background debug mode capabilities.
• Includes a dedicated Communications Processor Module (CPM) managing seven serial channels for high-performance communication tasks.
• Features a complete static design allowing operation from 0 Hz up to maximum clock speeds without refresh requirements.
• Supports slave mode operation to disable the CPU32+, enabling shared system bus access with external processors.

Applications

• Controller applications requiring integrated communications processing
• TS68040 companion chip configurations
• Peripheral device integration for TSPC603e systems

Procurement Notes

Verify the specific suffix code to confirm package type, as the 'R' suffix denotes a PGA 241 ceramic pin grid array and the 'A' suffix indicates a CERQUAD 240 ceramic leaded chip carrier. Confirm compliance requirements against MIL-STD-883 Class B or Atmel standards during acquisition. Ensure power supply stability meets the +5V ± 5% specification to prevent improper reset behavior.

Selection Notes

Select this component when a 32-bit architecture with integrated serial communication controllers is required. Consider the operating frequency limits of 25 MHz or 33 MHz based on performance needs. Evaluate thermal resistance characteristics for the chosen package style to ensure junction temperatures remain within safe operating limits under maximum power dissipation conditions.

Part Context

The TS68EN360 belongs to the TS68300 family of microcontrollers, specifically serving as a QUICC device. It utilizes an intermodule bus (IMB) to connect its internal modules, including the CPU32+ core, SIM60, and CPM. This architecture allows for flexible integration with other family members while providing enhanced capabilities over previous generations like the TS68302.

Replacement Considerations

Public confirmed substitute part numbers are not available in the provided documentation.