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WM8782SEDS/RV is listed in the ADCs/DACs - Special Purpose range at ChipApex. The manufacturer field lists Cirrus Logic Inc.. Its product description is IC ADC/AUDIO 24BIT 192K 20SSOP. Review the specifications below when checking this part for your BOM.
The WM8782SEDS/RV is a stereo audio analog-to-digital converter (ADC) from Cirrus Logic, housed in a 20-lead SSOP package. It features a 24-bit sigma-delta architecture with sampling rates from 8 kHz to 192 kHz and supports 16–24 bit digital word lengths. The device includes an internal operational amplifier for line-level inputs exceeding 1 Vrms and a digital high-pass filter for DC offset removal. Operating voltages range from 2.7 V to 5.5 V for analog supplies and 2.7 V to 3.6 V for digital cores. Key electrical specifications include a typical signal-to-noise ratio of 100 dB and total harmonic distortion of -93 dB at 48 kHz.
Verify the ordering suffix /RV indicates tape and reel packaging with a standard quantity of 2,000 units. Confirm that the component meets Pb-free requirements and operates within the specified temperature range of -40°C to +85°C. Ensure compatibility with the required soldering peak temperatures for lead-free assembly processes.
Select this component for applications requiring high-performance stereo digitization with flexible interface options. Ensure the system design accounts for separate analog (AVDD) and digital (DVDD) supply rails. Verify that the master clock frequency aligns with the desired sampling rate and oversampling configuration to maintain optimal performance metrics.
The WM8782SEDS/RV belongs to the WM8782 series of audio ADCs. The SEDS designation identifies the 20-lead SSOP package variant, while the RV suffix specifies tape and reel packaging. This distinguishes it from the SEDS/V variant, which uses tube packaging. Both variants share identical electrical characteristics and functional capabilities.
No direct public substitute part numbers are documented for this specific component. Designers should evaluate alternative stereo ADCs with comparable 24-bit resolution, 192 kHz sampling capability, and SSOP-20 packaging if replacement is necessary.
The audio interface mode is configured using the FORMAT pin: logic 0 selects Right Justified, logic 1 selects Left Justified, and a high-impedance state selects I2S.
The FSAMPEN pin controls the oversampling rate. Logic 0 enables 128x OSR for 48 kHz sampling, logic 1 enables 64x OSR for 96 kHz, and high-impedance enables 32x OSR for 192 kHz.
Yes, the M/S pin determines the mode. Logic 0 sets Slave mode, allowing external clocks, while logic 1 sets Master mode, where the device generates BCLK and LRCLK.
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