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The WM8953ECS/RV is a low-power stereo analog-to-digital converter (ADC) designed for mobile handsets and portable devices. It features four single-ended or differential input connections with up to 60dB of analogue gain per path. The device utilizes stereo 24-bit sigma-delta ADCs for high-fidelity audio recording from microphones or line inputs. Key electrical specifications include a signal-to-noise ratio (SNR) of 94dB (A-weighted) and total harmonic distortion (THD) of -82dB at 48kHz with a 3.3V supply. It supports sample rates of 8, 11.025, 12, 16, 22.05, 24, 32, 44.1, and 48kHz via an integrated PLL. The digital supply range is 1.71V–3.6V, while the analogue supply range is 2.7V–3.6V.
Verify the ordering code WM8953ECS/RV corresponds to the -40°C to +85°C temperature range and 42-ball W-CSP package. Confirm moisture sensitivity level MSL3 and peak soldering temperature of 260°C. Ensure the reel quantity matches the specified 3500 units. Check for Pb-free compliance as indicated in the ordering information.
Select this component when designing for portable systems requiring high-performance stereo audio capture with minimal power consumption. Ensure the design accommodates the 42-ball W-CSP package dimensions (3.226 x 3.44 x 0.7mm) and 0.5mm pitch. Verify that the system power supplies meet the DCVDD (1.71V–3.6V) and AVDD (2.7V–3.6V) requirements, noting that DCVDD must be less than or equal to AVDD and DBVDD.
The WM8953 is manufactured by Wolfson Microelectronics plc, which was acquired by Cirrus Logic Inc. This specific part number represents the production data version Rev 4.0 released in January 2009. It is part of the Wolfson audio codec portfolio optimized for mobile applications, distinct from later Cirrus Logic branded variants that may have updated packaging or feature sets.
Public confirmed substitute part numbers are not available in the provided documentation. Designers should consult official manufacturer cross-reference guides for compatible alternatives.
The maximum full-scale PGA input signal level is 1.0 Vrms (0 dBV) for single-ended inputs on LIN1/LIN3 or RIN1/RIN3, and 1.0 Vrms (0 dBV) for differential inputs on LIN1/LIN2, LIN3/LIN4, RIN1/RIN2, or RIN3/RIN4.
The internal POR circuit monitors AVDD and DCVDD. It asserts PORB low if either supply drops below a minimum threshold (Vpora_off or Vpord_off), holding the chip in reset until voltages rise above their respective turn-on thresholds (Vpora_on or Vpord_on).
The WM8953 supports 2-wire, 3-wire, and 4-wire serial control interfaces. The MODE pin selects between 2-wire mode (low) and 3/4-wire modes (high). The 4-wire mode allows readback via SDOUT, which can be configured as a GPIO function.