XCVM1802-2MLEVSVD1760

Soc System On Chip Overview

The AMD XCVM1802-2MLEVSVD1760 is a Versal Prime Series Adaptive SoC FPGA housed in a 1760-ball FCBGA package. It integrates dual-core Arm Cortex-A72 application processors and dual-core Arm Cortex-R5F real-time processors, operating at maximum clock frequencies of 600 MHz and 1.4 GHz respectively. The device features L1 instruction caches of 2 x 48 kB and 2 x 32 kB, alongside L1 data caches of 2 x 32 kB for each processor core. It operates with a minimum working temperature of -40°C and a maximum of +110°C, utilizing an 800 mV supply voltage.

Soc System On Chip Feature Summary

• Versal Prime Series architecture optimized for high-bandwidth DDR memory interfaces and low-latency inline acceleration
• Integrated programmable NoC and hardened IP for rapid system infrastructure development
• Support for PCIe Gen4/Gen5, SFP28, QSFP28, and RJ-45 Ethernet connectivity options

Soc System On Chip Applications

• Data center network and storage acceleration
• SmartNIC and 5G xHaul infrastructure
• Nx100G Ethernet and OTN networking equipment
• Communication test and measurement devices

Soc System On Chip Procurement Notes

Verify the specific ordering suffix against official AMD documentation to confirm pinout and electrical characteristics. Ensure compatibility with the Vivado Design Suite and Vitis Unified Software Platform for development. Confirm RoHS compliance status through authorized distributors or direct manufacturer channels prior to procurement.

Soc System On Chip Selection Notes

Select this model when requiring Versal Prime capabilities within a 1760-ball form factor. Compare resource availability against larger packages like the 2197-ball variant if higher I/O counts are needed. Validate that the integrated DDR controllers meet the target memory interface requirements for the specific application workload.

Soc System On Chip Part Context

This component belongs to the AMD Versal Prime series, designed for mid-range adaptive SoC applications. It complements the broader Versal portfolio by offering specialized optimization for connection and inline acceleration tasks. The device sits between standard FPGA offerings and higher-end Versal AI Engine models in terms of computational density.

Soc System On Chip Replacement Considerations

Direct substitutes include other Versal Prime devices such as the XCVM1802-2LSEVSVA2197 or XCVM1802-2MSEVSVD1760, depending on required package size and speed grade. Verify pin-to-pin compatibility and software configuration reuse before transitioning to alternative part numbers.