Z16C3220FSG

Overview

The Z16C3220FSG is a CMOS Integrated Universal Serial Controller (IUSC) manufactured by Zilog. It integrates dual-channel DMA with a high-speed serial communications channel to facilitate high data throughput. The device supports full-duplex channels operating at speeds up to 20 Mbit/sec, featuring two baud rate generators and a digital phase-locked loop for clock recovery. It includes 32-byte FIFOs for both receiver and transmitter and supports multiprotocol operation including Async, HDLC/SDLC, Bisync, and Synchronous Byte Oriented modes. The flexible bus interface directly supports 680X0 and 8086 families in 8 or 16-bit configurations. It is housed in a 68-pin PLCC package.

Feature Summary

• Dual-channel DMA with 32-bit addressing and support for single buffer, pipelined, array-chained, and linked-list transfer modes.
• Multiprotocol serial communication capability supporting Async, HDLC/SDLC, Bisync, and Synchronous Byte Oriented formats.
• Flexible bus interface compatible with Intel 8086 and Motorola 680X0 families, configurable for 8-bit or 16-bit data widths.
• Integrated 32-byte receive and transmit FIFOs with programmable throttling of DMA bus occupancy.

Applications

• ISDN, T1, and E1 (CEPT) applications utilizing time slot assigners.
• High-throughput data communications systems requiring reduced CPU overhead via on-chip DMA.
• Systems requiring direct connection to 680X0 or 8086 family microprocessors.

Procurement Notes

Verify the specific suffix 'FSG' against official Zilog documentation to confirm temperature range and package variations, as suffixes often denote environmental ratings or tape-and-reel packaging. Confirm current availability status as legacy components may be discontinued. Ensure compatibility with existing system voltage levels and bus timing requirements before procurement.

Selection Notes

Select this component when application requirements demand integrated serial control and high-performance DMA within a single chip. It is suitable for designs needing support for multiple synchronous and asynchronous protocols without external protocol controllers. Consider the 68-pin PLCC package constraints and verify that the host processor bus interface matches the IUSC's configurable 8-bit or 16-bit options.

Part Context

The Z16C32 series belongs to Zilog's IUSC family of integrated universal serial controllers. This series is designed to replace discrete serial controller and DMA chip combinations, reducing board space and component count. The Z16C3220 variant specifically denotes the speed grade and feature set within the broader Z16C32 product line.

Replacement Considerations

No public confirmed substitute part numbers are available in the provided source material. Consult Zilog or authorized distributors for end-of-life notifications and potential cross-reference recommendations.