ZL30672LFG7

Overview

The ZL30672LFG7 is a two-channel, ten-input, eighteen-output system synchronizer manufactured by Microsemi (Microchip Technology). It integrates two Digital Phase-Locked Loops (DPLLs) and three synthesizers to provide precise timing synchronization. The device accepts input frequencies from 0.5Hz to 900MHz and generates output frequencies up to 1045MHz with high-resolution fractional conversion. Key electrical parameters include an operating temperature range of -40°C to +85°C, a supply voltage of 1.8V and 3.3V core VDD, and power consumption of 1.3W for typical configurations. It supports ITU-T G.8262 and G.813 compliance.

Feature Summary

• Two DPLL channels with programmable bandwidth from 0.1mHz to 470Hz and per-DPLL phase adjustment at 1ps resolution.
• Ten input pins accepting differential or CMOS signals from 0.5Hz to 900MHz, supporting REF+SYNC frequency/phase/time locking.
• Three synthesizers providing up to 18 outputs (16 single-ended or 8 differential) with jitter typically less than 1ps RMS.
• Supports hitless reference switching, automatic self-configuration from internal Flash, and SPI/I2C processor interfaces.

Applications

• Central system timing ICs for Synchronous Ethernet (SyncE) and SyncE+1588 networks.
• SONET/SDH and OTN carrier-grade systems requiring Stratum 2-4 compliance.
• Wireless base station infrastructure utilizing IEEE 1588 precision time protocol.

Procurement Notes

Verify the ordering suffix LFG7 corresponds to the 80-lead LGA package in trays. Confirm that the specific revision matches the November 2019 product brief. Ensure compatibility with the required 1.8V and 3.3V supply voltages for the core logic and output drivers respectively.

Selection Notes

Select the ZL30672LFG7 when exactly two DPLL channels are required for independent timing domains. Compare against the ZL30671 if only one channel is needed, or the ZL30673 if three channels are necessary. Evaluate the need for 18 total outputs versus the lower count of other variants in the family.

Part Context

This component belongs to the ZL3067x series of system synchronizers, which includes the ZL30671 (1-channel), ZL30672 (2-channel), and ZL30673 (3-channel). All variants share the same 80-lead LGA package and feature set regarding inputs and outputs, differing primarily in the number of integrated DPLL channels available for timing synchronization tasks.

Replacement Considerations

Direct substitutes within the same package and pinout include the ZL30671LFG7 and ZL30673LFG7. Selection depends on whether fewer or additional DPLL channels are acceptable for the design requirements.