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The ZL40264LDF1 is a four-output ultra-low additive phase noise PCIe Gen 1 to 5 and UPI/QPI fanout buffer manufactured by Microchip Technology. It features one differential input accepting any differential format and four differential HCSL outputs. The device supports clock frequencies from 0 Hz to 400 MHz and operates on 2.5 V or 3.3 V power supplies. Key electrical parameters include an ultra-low additive jitter of 32 fs in the 12 kHz to 20 MHz integration band at 400 MHz, a maximum output-to-output skew of 50 ps, and embedded Low Drop Out (LDO) voltage regulation for superior power supply noise rejection.
Verify the ordering suffix 'F1' corresponds to the 20-pin QFN tape and reel packaging configuration. Confirm that the required operating temperature range of -40°C to +85°C aligns with the system environment. Ensure power supply decoupling capacitors are placed close to the VDD and VDDO pins as specified in the datasheet to maintain performance.
Select this component when low additive jitter is critical for PCIe Gen 1 through Gen 5 or UPI/QPI applications. The device requires separate VDD and VDDO supplies, which must be turned on and off simultaneously. Verify that the input signal format matches the AC coupling requirements if using LVPECL or LVDS sources, as the native input is HCSL.
The ZL40264LDF1 belongs to the ZL40264 family of fanout buffers. The 'LDG1' suffix denotes the same functional device packaged in trays, whereas 'LDF1' indicates tape and reel packaging. Both variants share identical electrical characteristics and pinouts within the 4x4 mm 20-pin QFN package.
ZL40264LDG1 is a confirmed public substitute offering identical functionality in tray packaging instead of tape and reel.